scsi: ufs: allow custom delay prior to host enabling
authorStanley Chu <stanley.chu@mediatek.com>
Wed, 18 Mar 2020 10:40:14 +0000 (18:40 +0800)
committerMartin K. Petersen <martin.petersen@oracle.com>
Fri, 27 Mar 2020 02:07:15 +0000 (22:07 -0400)
Currently a 1 ms delay is applied before polling CONTROLLER_ENABLE
bit. This delay may not be required or can be changed in different
controllers. Make the delay as a changeable value in struct ufs_hba to
allow it customized by vendors.

Link: https://lore.kernel.org/r/20200318104016.28049-6-stanley.chu@mediatek.com
Reviewed-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/scsi/ufs/ufshcd.c
drivers/scsi/ufs/ufshcd.h

index bd1119fe34f342c431eb25ee930d8a3c094ac567..01839eef08cb7ba2282b16c71b1d4fef63df926e 100644 (file)
@@ -4235,7 +4235,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba)
         * instruction might be read back.
         * This delay can be changed based on the controller.
         */
-       usleep_range(1000, 1100);
+       ufshcd_delay_us(hba->hba_enable_delay_us, 100);
 
        /* wait for the host controller to complete initialization */
        retry = 10;
@@ -8359,6 +8359,7 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
 
        hba->mmio_base = mmio_base;
        hba->irq = irq;
+       hba->hba_enable_delay_us = 1000;
 
        err = ufshcd_hba_init(hba);
        if (err)
index 493674f99dcc3be294dd69ef9aa3e81d17a6144a..9f1576bbfc500c491a3607c2d50a8e802322098c 100644 (file)
@@ -668,6 +668,7 @@ struct ufs_hba {
        u32 eh_flags;
        u32 intr_mask;
        u16 ee_ctrl_mask;
+       u16 hba_enable_delay_us;
        bool is_powered;
        struct ufs_init_prefetch init_prefetch_data;