struct eeh_ops {
        char *name;
        int (*init)(void);
-       int (*post_init)(void);
        void* (*probe)(struct pci_dn *pdn, void *data);
        int (*set_option)(struct eeh_pe *pe, int option);
        int (*get_pe_addr)(struct eeh_pe *pe);
 
 struct eeh_dev *eeh_dev_init(struct pci_dn *pdn);
 void eeh_dev_phb_init_dynamic(struct pci_controller *phb);
-int eeh_init(void);
+void eeh_probe_devices(void);
 int __init eeh_ops_register(struct eeh_ops *ops);
 int __exit eeh_ops_unregister(const char *name);
 int eeh_check_failure(const volatile void __iomem *token);
         return false;
 }
 
-static inline int eeh_init(void)
-{
-       return 0;
-}
+static inline void eeh_probe_devices(void) { }
 
 static inline void *eeh_dev_init(struct pci_dn *pdn, void *data)
 {
 
        .notifier_call = eeh_reboot_notifier,
 };
 
+void eeh_probe_devices(void)
+{
+       struct pci_controller *hose, *tmp;
+       struct pci_dn *pdn;
+
+       /* Enable EEH for all adapters */
+       list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
+               pdn = hose->pci_data;
+               traverse_pci_dn(pdn, eeh_ops->probe, NULL);
+       }
+}
+
 /**
  * eeh_init - EEH initialization
  *
  * Even if force-off is set, the EEH hardware is still enabled, so that
  * newer systems can boot.
  */
-int eeh_init(void)
+static int eeh_init(void)
 {
        struct pci_controller *hose, *tmp;
-       struct pci_dn *pdn;
-       static int cnt = 0;
        int ret = 0;
 
-       /*
-        * We have to delay the initialization on PowerNV after
-        * the PCI hierarchy tree has been built because the PEs
-        * are figured out based on PCI devices instead of device
-        * tree nodes
-        */
-       if (machine_is(powernv) && cnt++ <= 0)
-               return ret;
-
        /* Register reboot notifier */
        ret = register_reboot_notifier(&eeh_reboot_nb);
        if (ret) {
        if (ret)
                return ret;
 
-       /* Enable EEH for all adapters */
-       list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
-               pdn = hose->pci_data;
-               traverse_pci_dn(pdn, eeh_ops->probe, NULL);
-       }
-
-       /*
-        * Call platform post-initialization. Actually, It's good chance
-        * to inform platform that EEH is ready to supply service if the
-        * I/O cache stuff has been built up.
-        */
-       if (eeh_ops->post_init) {
-               ret = eeh_ops->post_init();
-               if (ret)
-                       return ret;
-       }
+       eeh_probe_devices();
 
        if (eeh_enabled())
                pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
        else
                eeh_add_flag(EEH_FORCE_DISABLED);
 
-       /* Notify the backend */
-       if (eeh_ops->post_init)
-               eeh_ops->post_init();
-
        return 0;
 }
 
 
 #include "powernv.h"
 #include "pci.h"
 
-static bool pnv_eeh_nb_init = false;
 static int eeh_event_irq = -EINVAL;
 
 static int pnv_eeh_init(void)
  * been built. If the I/O cache staff has been built, EEH is
  * ready to supply service.
  */
-static int pnv_eeh_post_init(void)
+int pnv_eeh_post_init(void)
 {
        struct pci_controller *hose;
        struct pnv_phb *phb;
        int ret = 0;
 
-       /* Register OPAL event notifier */
-       if (!pnv_eeh_nb_init) {
-               eeh_event_irq = opal_event_request(ilog2(OPAL_EVENT_PCI_ERROR));
-               if (eeh_event_irq < 0) {
-                       pr_err("%s: Can't register OPAL event interrupt (%d)\n",
-                              __func__, eeh_event_irq);
-                       return eeh_event_irq;
-               }
+       /* Probe devices & build address cache */
+       eeh_probe_devices();
+       eeh_addr_cache_build();
 
-               ret = request_irq(eeh_event_irq, pnv_eeh_event,
-                               IRQ_TYPE_LEVEL_HIGH, "opal-eeh", NULL);
-               if (ret < 0) {
-                       irq_dispose_mapping(eeh_event_irq);
-                       pr_err("%s: Can't request OPAL event interrupt (%d)\n",
-                              __func__, eeh_event_irq);
-                       return ret;
-               }
+       /* Register OPAL event notifier */
+       eeh_event_irq = opal_event_request(ilog2(OPAL_EVENT_PCI_ERROR));
+       if (eeh_event_irq < 0) {
+               pr_err("%s: Can't register OPAL event interrupt (%d)\n",
+                      __func__, eeh_event_irq);
+               return eeh_event_irq;
+       }
 
-               pnv_eeh_nb_init = true;
+       ret = request_irq(eeh_event_irq, pnv_eeh_event,
+                         IRQ_TYPE_LEVEL_HIGH, "opal-eeh", NULL);
+       if (ret < 0) {
+               irq_dispose_mapping(eeh_event_irq);
+               pr_err("%s: Can't request OPAL event interrupt (%d)\n",
+                      __func__, eeh_event_irq);
+               return ret;
        }
 
        if (!eeh_enabled())
        if ((pdn->class_code >> 8) == PCI_CLASS_BRIDGE_ISA)
                return NULL;
 
+       /* Skip if we haven't probed yet */
+       if (phb->ioda.pe_rmap[config_addr] == IODA_INVALID_PE)
+               return NULL;
+
        /* Initialize eeh device */
        edev->class_code = pdn->class_code;
        edev->mode      &= 0xFFFFFF00;
 static struct eeh_ops pnv_eeh_ops = {
        .name                   = "powernv",
        .init                   = pnv_eeh_init,
-       .post_init              = pnv_eeh_post_init,
        .probe                  = pnv_eeh_probe,
        .set_option             = pnv_eeh_set_option,
        .get_pe_addr            = pnv_eeh_get_pe_addr,
 
        pnv_pci_ioda_create_dbgfs();
 
 #ifdef CONFIG_EEH
-       eeh_init();
-       eeh_addr_cache_build();
+       pnv_eeh_post_init();
 #endif
 }
 
 
 extern void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq);
 extern bool pnv_pci_enable_device_hook(struct pci_dev *dev);
 extern void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable);
+extern int pnv_eeh_post_init(void);
 
 extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level,
                            const char *fmt, ...);