.name = "arm.cortex-a9-global-timer.percpu",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(control, A9GTimerPerCPU),
VMSTATE_UINT64(compare, A9GTimerPerCPU),
VMSTATE_UINT32(status, A9GTimerPerCPU),
.version_id = 1,
.minimum_version_id = 1,
.needed = vmstate_a9_gtimer_control_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(control, A9GTimerState),
VMSTATE_END_OF_LIST()
}
.name = "arm.cortex-a9-global-timer",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_TIMER_PTR(timer, A9GTimerState),
VMSTATE_UINT64(counter, A9GTimerState),
VMSTATE_UINT64(ref_counter, A9GTimerState),
A9GTimerPerCPU),
VMSTATE_END_OF_LIST()
},
- .subsections = (const VMStateDescription*[]) {
+ .subsections = (const VMStateDescription * const []) {
&vmstate_a9_gtimer_control,
NULL
}
.name = "a10.pit",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(irq_enable, AwA10PITState),
VMSTATE_UINT32(irq_status, AwA10PITState),
VMSTATE_UINT32_ARRAY(control, AwA10PITState, AW_A10_PIT_TIMER_NR),
.name = "arm_mptimer_timerblock",
.version_id = 3,
.minimum_version_id = 3,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(control, TimerBlock),
VMSTATE_UINT32(status, TimerBlock),
VMSTATE_PTIMER(timer, TimerBlock),
.name = "arm_mptimer",
.version_id = 3,
.minimum_version_id = 3,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_STRUCT_VARRAY_UINT32(timerblock, ARMMPTimerState, num_cpu,
3, vmstate_timerblock, TimerBlock),
VMSTATE_END_OF_LIST()
.name = "arm_timer",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(control, arm_timer_state),
VMSTATE_UINT32(limit, arm_timer_state),
VMSTATE_INT32(int_level, arm_timer_state),
.name = "sp804",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_INT32_ARRAY(level, SP804State, 2),
VMSTATE_END_OF_LIST()
}
.name = "armv7m_systick",
.version_id = 3,
.minimum_version_id = 3,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_CLOCK(refclk, SysTickState),
VMSTATE_CLOCK(cpuclk, SysTickState),
VMSTATE_UINT32(control, SysTickState),
.name = "aspeed.timer",
.version_id = 2,
.minimum_version_id = 2,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT8(id, AspeedTimer),
VMSTATE_INT32(level, AspeedTimer),
VMSTATE_TIMER(timer, AspeedTimer),
.name = "aspeed.timerctrl",
.version_id = 2,
.minimum_version_id = 2,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(ctrl, AspeedTimerCtrlState),
VMSTATE_UINT32(ctrl2, AspeedTimerCtrlState),
VMSTATE_UINT32(ctrl3, AspeedTimerCtrlState),
.name = "bcm2835_sys_timer",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(reg.ctrl_status, BCM2835SystemTimerState),
VMSTATE_UINT32_ARRAY(reg.compare, BCM2835SystemTimerState,
BCM2835_SYSTIMER_COUNT),
.minimum_version_id = 1,
.pre_save = cadence_timer_pre_save,
.post_load = cadence_timer_post_load,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(reg_clock, CadenceTimerState),
VMSTATE_UINT32(reg_count, CadenceTimerState),
VMSTATE_UINT32(reg_value, CadenceTimerState),
.name = "cadence_TTC",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_STRUCT_ARRAY(timer, CadenceTTCState, 3, 0,
vmstate_cadence_timer,
CadenceTimerState),
.name = "cmsdk-apb-dualtimer-module",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_PTIMER(timer, CMSDKAPBDualTimerModule),
VMSTATE_UINT32(load, CMSDKAPBDualTimerModule),
VMSTATE_UINT32(value, CMSDKAPBDualTimerModule),
.name = "cmsdk-apb-dualtimer",
.version_id = 2,
.minimum_version_id = 2,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_CLOCK(timclk, CMSDKAPBDualTimer),
VMSTATE_STRUCT_ARRAY(timermod, CMSDKAPBDualTimer,
CMSDK_APB_DUALTIMER_NUM_MODULES,
.name = "cmsdk-apb-timer",
.version_id = 2,
.minimum_version_id = 2,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_PTIMER(timer, CMSDKAPBTimer),
VMSTATE_CLOCK(pclk, CMSDKAPBTimer),
VMSTATE_UINT32(ctrl, CMSDKAPBTimer),
.name = "digic.timer",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_PTIMER(ptimer, DigicTimerState),
VMSTATE_UINT32(control, DigicTimerState),
VMSTATE_UINT32(relvalue, DigicTimerState),
.name = "etraxfs",
.version_id = 0,
.minimum_version_id = 0,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_PTIMER(ptimer_t0, ETRAXTimerState),
VMSTATE_PTIMER(ptimer_t1, ETRAXTimerState),
VMSTATE_PTIMER(ptimer_wd, ETRAXTimerState),
.name = "exynos4210.mct.tick_timer",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(cnt_run, struct tick_timer),
VMSTATE_UINT32(int_run, struct tick_timer),
VMSTATE_UINT32(last_icnto, struct tick_timer),
.name = "exynos4210.mct.lregs",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32_ARRAY(cnt, struct lregs, L_REG_CNT_AMOUNT),
VMSTATE_UINT32(tcon, struct lregs),
VMSTATE_UINT32(int_cstat, struct lregs),
.name = "exynos4210.mct.lt",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_INT32(id, Exynos4210MCTLT),
VMSTATE_STRUCT(tick_timer, Exynos4210MCTLT, 0,
vmstate_tick_timer,
.name = "exynos4210.mct.lregs",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT64(cnt, struct gregs),
VMSTATE_UINT32(cnt_wstat, struct gregs),
VMSTATE_UINT32(tcon, struct gregs),
.name = "exynos4210.mct.lt",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_STRUCT(reg, Exynos4210MCTGT, 0, vmstate_gregs,
struct gregs),
VMSTATE_UINT64(count, Exynos4210MCTGT),
.name = "exynos4210.mct",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(reg_mct_cfg, Exynos4210MCTState),
VMSTATE_STRUCT_ARRAY(l_timer, Exynos4210MCTState, 2, 0,
vmstate_exynos4210_mct_lt, Exynos4210MCTLT),
.name = "exynos4210.pwm.pwm",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(id, Exynos4210PWM),
VMSTATE_UINT32(freq, Exynos4210PWM),
VMSTATE_PTIMER(ptimer, Exynos4210PWM),
.name = "exynos4210.pwm",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32_ARRAY(reg_tcfg, Exynos4210PWMState, 2),
VMSTATE_UINT32(reg_tcon, Exynos4210PWMState),
VMSTATE_UINT32(reg_tint_cstat, Exynos4210PWMState),
.version_id = 1,
.minimum_version_id = 1,
.needed = hpet_rtc_irq_level_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT8(rtc_irq_level, HPETState),
VMSTATE_END_OF_LIST()
}
.version_id = 1,
.minimum_version_id = 1,
.needed = hpet_offset_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT64(hpet_offset, HPETState),
VMSTATE_END_OF_LIST()
}
.name = "hpet_timer",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT8(tn, HPETTimer),
VMSTATE_UINT64(config, HPETTimer),
VMSTATE_UINT64(cmp, HPETTimer),
.pre_save = hpet_pre_save,
.pre_load = hpet_pre_load,
.post_load = hpet_post_load,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT64(config, HPETState),
VMSTATE_UINT64(isr, HPETState),
VMSTATE_UINT64(hpet_counter, HPETState),
vmstate_hpet_timer, HPETTimer),
VMSTATE_END_OF_LIST()
},
- .subsections = (const VMStateDescription*[]) {
+ .subsections = (const VMStateDescription * const []) {
&vmstate_hpet_rtc_irq_level,
&vmstate_hpet_offset,
NULL
.name = "pit channel",
.version_id = 2,
.minimum_version_id = 2,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_INT32(count, PITChannelState),
VMSTATE_UINT16(latched_count, PITChannelState),
VMSTATE_UINT8(count_latched, PITChannelState),
.minimum_version_id = 2,
.pre_save = pit_dispatch_pre_save,
.post_load = pit_dispatch_post_load,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32_V(channels[0].irq_disabled, PITCommonState, 3),
VMSTATE_STRUCT_ARRAY(channels, PITCommonState, 3, 2,
vmstate_pit_channel, PITChannelState),
.version_id = 2,
.minimum_version_id = 2,
.post_load = ibex_timer_post_load,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(timer_ctrl, IbexTimerState),
VMSTATE_UINT32(timer_cfg0, IbexTimerState),
VMSTATE_UINT32(timer_compare_lower0, IbexTimerState),
.name = TYPE_IMX_EPIT,
.version_id = 3,
.minimum_version_id = 3,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(cr, IMXEPITState),
VMSTATE_UINT32(sr, IMXEPITState),
VMSTATE_UINT32(lr, IMXEPITState),
.name = TYPE_IMX_GPT,
.version_id = 3,
.minimum_version_id = 3,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(cr, IMXGPTState),
VMSTATE_UINT32(pr, IMXGPTState),
VMSTATE_UINT32(sr, IMXGPTState),
.name = "mss-timer-block",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_PTIMER(ptimer, struct Msf2Timer),
VMSTATE_UINT32_ARRAY(regs, struct Msf2Timer, R_TIM1_MAX),
VMSTATE_END_OF_LIST()
.name = TYPE_MSS_TIMER,
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(freq_hz, MSSTimerState),
VMSTATE_STRUCT_ARRAY(timers, MSSTimerState, NUM_TIMERS, 0,
vmstate_timers, struct Msf2Timer),
.name = "npcm7xx-base-timer",
.version_id = 0,
.minimum_version_id = 0,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_TIMER(qtimer, NPCM7xxBaseTimer),
VMSTATE_INT64(expires_ns, NPCM7xxBaseTimer),
VMSTATE_INT64(remaining_ns, NPCM7xxBaseTimer),
.name = "npcm7xx-timer",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_STRUCT(base_timer, NPCM7xxTimer,
0, vmstate_npcm7xx_base_timer,
NPCM7xxBaseTimer),
.name = "npcm7xx-watchdog-timer",
.version_id = 0,
.minimum_version_id = 0,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_STRUCT(base_timer, NPCM7xxWatchdogTimer,
0, vmstate_npcm7xx_base_timer,
NPCM7xxBaseTimer),
.name = "npcm7xx-timer-ctrl",
.version_id = 2,
.minimum_version_id = 2,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(tisr, NPCM7xxTimerCtrlState),
VMSTATE_CLOCK(clock, NPCM7xxTimerCtrlState),
VMSTATE_STRUCT_ARRAY(timer, NPCM7xxTimerCtrlState,
.name = TYPE_NRF51_TIMER,
.version_id = 1,
.post_load = nrf51_timer_post_load,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_TIMER(timer, NRF51TimerState),
VMSTATE_INT64(timer_start_ns, NRF51TimerState),
VMSTATE_INT64(update_counter_ns, NRF51TimerState),
.name = "pxa2xx_timer0",
.version_id = 2,
.minimum_version_id = 2,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(value, PXA2xxTimer0),
VMSTATE_END_OF_LIST(),
},
.name = "pxa2xx_timer4",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_STRUCT(tm, PXA2xxTimer4, 1,
vmstate_pxa2xx_timer0_regs, PXA2xxTimer0),
VMSTATE_INT32(oldclock, PXA2xxTimer4),
.version_id = 1,
.minimum_version_id = 1,
.post_load = pxa25x_timer_post_load,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_INT32(clock, PXA2xxTimerInfo),
VMSTATE_INT32(oldclock, PXA2xxTimerInfo),
VMSTATE_UINT64(lastload, PXA2xxTimerInfo),
.name = "rx-cmt",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT16(cmstr, RCMTState),
VMSTATE_UINT16_ARRAY(cmcr, RCMTState, CMT_CH),
VMSTATE_UINT16_ARRAY(cmcnt, RCMTState, CMT_CH),
.name = "rx-tmr",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_INT64(tick, RTMRState),
VMSTATE_UINT8_ARRAY(tcnt, RTMRState, TMR_CH),
VMSTATE_UINT8_ARRAY(tcora, RTMRState, TMR_CH),
.name = TYPE_SIFIVE_PWM,
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_TIMER_ARRAY(timer, SiFivePwmState, 4),
VMSTATE_UINT64(tick_offset, SiFivePwmState),
VMSTATE_UINT32(pwmcfg, SiFivePwmState),
.name ="timer",
.version_id = 3,
.minimum_version_id = 3,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT64(limit, CPUTimerState),
VMSTATE_UINT32(count, CPUTimerState),
VMSTATE_UINT32(counthigh, CPUTimerState),
.name ="slavio_timer",
.version_id = 3,
.minimum_version_id = 3,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_STRUCT_ARRAY(cputimer, SLAVIO_TIMERState, MAX_CPUS + 1, 3,
vmstate_timer, CPUTimerState),
VMSTATE_END_OF_LIST()
.name = "sse-counter",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_CLOCK(clk, SSECounter),
VMSTATE_END_OF_LIST()
}
.name = "sse-timer",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_TIMER(timer, SSETimer),
VMSTATE_UINT32(cntfrq, SSETimer),
VMSTATE_UINT32(cntp_ctl, SSETimer),
.name = "stellaris_gptm",
.version_id = 2,
.minimum_version_id = 2,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(config, gptm_state),
VMSTATE_UINT32_ARRAY(mode, gptm_state, 2),
VMSTATE_UINT32(control, gptm_state),
.name = TYPE_STM32F2XX_TIMER,
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_INT64(tick_offset, STM32F2XXTimerState),
VMSTATE_UINT32(tim_cr1, STM32F2XXTimerState),
VMSTATE_UINT32(tim_cr2, STM32F2XXTimerState),