drm/amd/display: Add debug support to override the Minimum DRAM Clock
authorDavid Galiffi <David.Galiffi@amd.com>
Mon, 13 Sep 2021 22:05:24 +0000 (18:05 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 28 Sep 2021 13:30:10 +0000 (09:30 -0400)
[Why]
Requested feature to assist with Thermal, Acoustic, Power, and
Performance tuning.

[How]
Add a debug field that will override calculated minimum DRAM clock,
if the debug value is larger than the calculate value.

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c

index b194a2727bd80196fcff90853a657234e1bad0a7..a46c663ed8c5b28e70db28cd679b417542766b20 100644 (file)
@@ -565,6 +565,7 @@ struct dc_debug_options {
        enum wm_report_mode pplib_wm_report_mode;
        unsigned int min_disp_clk_khz;
        unsigned int min_dpp_clk_khz;
+       unsigned int min_dram_clk_khz;
        int sr_exit_time_dpm0_ns;
        int sr_enter_plus_exit_time_dpm0_ns;
        int sr_exit_time_ns;
index 3c388afa06dcd9c4920da2ed8f48361e981bc950..aeb868ace31c06f5b68bf94b05818c6df6cc2277 100644 (file)
@@ -3117,6 +3117,10 @@ void dcn20_calculate_dlg_params(
        context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000;
        context->bw_ctx.bw.dcn.clk.socclk_khz = context->bw_ctx.dml.vba.SOCCLK * 1000;
        context->bw_ctx.bw.dcn.clk.dramclk_khz = context->bw_ctx.dml.vba.DRAMSpeed * 1000 / 16;
+
+       if (dc->debug.min_dram_clk_khz > context->bw_ctx.bw.dcn.clk.dramclk_khz)
+               context->bw_ctx.bw.dcn.clk.dramclk_khz = dc->debug.min_dram_clk_khz;
+
        context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = context->bw_ctx.dml.vba.DCFCLKDeepSleep * 1000;
        context->bw_ctx.bw.dcn.clk.fclk_khz = context->bw_ctx.dml.vba.FabricClock * 1000;
        context->bw_ctx.bw.dcn.clk.p_state_change_support =