RISC-V: KVM: Allow Guest use Svinval extension
authorAnup Patel <apatel@ventanamicro.com>
Sun, 2 Oct 2022 04:48:42 +0000 (10:18 +0530)
committerAnup Patel <anup@brainfault.org>
Sun, 2 Oct 2022 04:48:42 +0000 (10:18 +0530)
We should advertise Svinval ISA extension to KVM user-space whenever
host supports it. This will allow KVM user-space (i.e. QEMU or KVMTOOL)
to pass on this information to Guest via ISA string.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/uapi/asm/kvm.h
arch/riscv/kvm/vcpu.c

index 7351417afd62e32c69eaa6ec9bc57675815ad322..b6770ee0887211ec1323744f6778ea13bcda66b2 100644 (file)
@@ -98,6 +98,7 @@ enum KVM_RISCV_ISA_EXT_ID {
        KVM_RISCV_ISA_EXT_M,
        KVM_RISCV_ISA_EXT_SVPBMT,
        KVM_RISCV_ISA_EXT_SSTC,
+       KVM_RISCV_ISA_EXT_SVINVAL,
        KVM_RISCV_ISA_EXT_MAX,
 };
 
index d0f08d5b4282952c82a462cb8f4ba9bc27a5f9eb..901bb5c0cb50396b8552be46695930df83a0c817 100644 (file)
@@ -53,6 +53,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
        RISCV_ISA_EXT_m,
        RISCV_ISA_EXT_SVPBMT,
        RISCV_ISA_EXT_SSTC,
+       RISCV_ISA_EXT_SVINVAL,
 };
 
 static unsigned long kvm_riscv_vcpu_base2isa_ext(unsigned long base_ext)
@@ -87,6 +88,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
        case KVM_RISCV_ISA_EXT_I:
        case KVM_RISCV_ISA_EXT_M:
        case KVM_RISCV_ISA_EXT_SSTC:
+       case KVM_RISCV_ISA_EXT_SVINVAL:
                return false;
        default:
                break;