#define OMAP_PRM_HAS_RSTCTRL   BIT(0)
 #define OMAP_PRM_HAS_RSTST     BIT(1)
 #define OMAP_PRM_HAS_NO_CLKDM  BIT(2)
+#define OMAP_PRM_RET_WHEN_IDLE BIT(3)
 
 #define OMAP_PRM_HAS_RESETS    (OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_RSTST)
 
                .name = "core", .base = 0x4a306700,
                .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_reton,
                .rstctrl = 0x210, .rstst = 0x214, .clkdm_name = "ducati",
-               .rstmap = rst_map_012
+               .rstmap = rst_map_012,
+               .flags = OMAP_PRM_RET_WHEN_IDLE,
        },
        {
                .name = "ivahd", .base = 0x4a306f00,
        },
        {
                .name = "l4per", .base = 0x4a307400,
-               .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_reton
+               .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_reton,
+               .flags = OMAP_PRM_RET_WHEN_IDLE,
        },
        {
                .name = "cefuse", .base = 0x4a307600,
 {
        struct omap_prm_domain *prmd;
        int ret;
-       u32 v;
+       u32 v, mode;
 
        prmd = genpd_to_prm_domain(domain);
        if (!prmd->cap)
        else
                v = readl_relaxed(prmd->prm->base + prmd->pwrstctrl);
 
-       writel_relaxed(v | OMAP_PRMD_ON_ACTIVE,
+       if (prmd->prm->data->flags & OMAP_PRM_RET_WHEN_IDLE)
+               mode = OMAP_PRMD_RETENTION;
+       else
+               mode = OMAP_PRMD_ON_ACTIVE;
+
+       writel_relaxed((v & ~PRM_POWERSTATE_MASK) | mode,
                       prmd->prm->base + prmd->pwrstctrl);
 
        /* wait for the transition bit to get cleared */