drm/xe: Drop "_REG" suffix from CSFE_CHICKEN1
authorMatt Roper <matthew.d.roper@intel.com>
Thu, 14 Dec 2023 18:47:01 +0000 (10:47 -0800)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 16:46:16 +0000 (11:46 -0500)
We don't use this suffix on any other registers, and it isn't part of
the register's official name either, so drop it for consistency.

While at it, move the register definition slightly so that it isn't
separating RING_CMD_CCTL's definition from its fields.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20231214184659.2249559-11-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/regs/xe_engine_regs.h
drivers/gpu/drm/xe/xe_wa.c

index 1a857c4edcf5ee2cb606b6005f816ca35d4acf75..67da19f9836f96e85c823d9cf04e4716183db70c 100644 (file)
 #define RING_ESR(base)                         XE_REG((base) + 0xb8)
 
 #define RING_CMD_CCTL(base)                    XE_REG((base) + 0xc4, XE_REG_OPTION_MASKED)
-
-#define CSFE_CHICKEN1_REG(base)                        XE_REG((base) + 0xd4, XE_REG_OPTION_MASKED)
-#define   GHWSP_CSB_REPORT_DIS                 REG_BIT(15)
-#define   PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS  REG_BIT(14)
-
 /*
  * CMD_CCTL read/write fields take a MOCS value and _not_ a table index.
  * The lsb of each can be considered a separate enabling bit for encryption.
 #define   CMD_CCTL_WRITE_OVERRIDE_MASK         REG_GENMASK(13, 8)
 #define   CMD_CCTL_READ_OVERRIDE_MASK          REG_GENMASK(6, 1)
 
+#define CSFE_CHICKEN1(base)                    XE_REG((base) + 0xd4, XE_REG_OPTION_MASKED)
+#define   GHWSP_CSB_REPORT_DIS                 REG_BIT(15)
+#define   PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS  REG_BIT(14)
+
 #define RING_BBADDR(base)                      XE_REG((base) + 0x140)
 #define RING_BBADDR_UDW(base)                  XE_REG((base) + 0x168)
 
index 23f1285135b8daa992862f1ca4360430899525d2..12829748bb6c1919a00a5c9a564ef083a98f33e9 100644 (file)
@@ -605,7 +605,7 @@ static const struct xe_rtp_entry_sr engine_was[] = {
         */
        { XE_RTP_NAME("18032095049, 16021639441"),
          XE_RTP_RULES(GRAPHICS_VERSION(2004)),
-         XE_RTP_ACTIONS(SET(CSFE_CHICKEN1_REG(0),
+         XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),
                             GHWSP_CSB_REPORT_DIS |
                             PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS,
                             XE_RTP_ACTION_FLAG(ENGINE_BASE)))