intel_dsc_dsi_pps_write(encoder, pipe_config);
- intel_dsc_enable(pipe_config);
-
/* step6c: configure transcoder timings */
gen11_dsi_set_transcoder_timings(encoder, pipe_config);
}
intel_ddi_enable_fec(encoder, crtc_state);
intel_dsc_dp_pps_write(encoder, crtc_state);
-
- if (!crtc_state->bigjoiner)
- intel_dsc_enable(crtc_state);
}
static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
intel_ddi_enable_pipe_clock(encoder, crtc_state);
intel_dsc_dp_pps_write(encoder, crtc_state);
-
- if (!crtc_state->bigjoiner)
- intel_dsc_enable(crtc_state);
}
static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(state->base.dev);
struct intel_crtc_state *master_crtc_state;
struct intel_crtc *master_crtc;
struct drm_connector_state *conn_state;
if (crtc_state->bigjoiner_slave)
intel_encoders_pre_enable(state, master_crtc);
-
- /* need to enable VDSC, which we skipped in pre-enable */
- intel_dsc_enable(crtc_state);
-
- if (DISPLAY_VER(dev_priv) >= 13)
- intel_uncompressed_joiner_enable(crtc_state);
}
static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
icl_ddi_bigjoiner_pre_enable(state, new_crtc_state);
}
+ intel_dsc_enable(new_crtc_state);
+
+ if (DISPLAY_VER(dev_priv) >= 13)
+ intel_uncompressed_joiner_enable(new_crtc_state);
+
intel_set_pipe_src_size(new_crtc_state);
if (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
bdw_set_pipemisc(new_crtc_state);