ARM: dts: am335x-nano: Fix GPIO settings for RTS/CTS pins on UART3 & 4

The NanoBone platform uses GPIO pins for RTS/CTS control.
The DTS still uses the hardware RTS/CTS pins so this needs fixing.

Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Message-Id: <20221130140547.295859-2-mpfj@newflow.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts
index b6f2567bd65a448399a6b5ff94fc1d753e4f25ed..05cbfe24f7782a7cc849854fc6a11ab3bad29025 100644 (file)
--- a/arch/arm/boot/dts/am335x-nano.dts
+++ b/arch/arm/boot/dts/am335x-nano.dts
@@ -120,8 +120,8 @@
 
        uart3_pins: uart3_pins {
                pinctrl-single,pins = <
-                       AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_INPUT_PULLUP, MUX_MODE6)      /* lcd_data10.uart3_ctsn */
-                       AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE6)            /* lcd_data11.uart3_rtsn */
+                       AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_INPUT_PULLUP, MUX_MODE7)      /* lcd_data10.gpio2[16] */
+                       AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE7)            /* lcd_data11.gpio2[17] */
                        AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE1)               /* spi0_cs1.uart3_rxd */
                        AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT, MUX_MODE1)             /* ecap0_in_pwm0_out.uart3_txd */
                >;
@@ -129,8 +129,8 @@
 
        uart4_pins: uart4_pins {
                pinctrl-single,pins = <
-                       AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT_PULLUP, MUX_MODE6)      /* lcd_data12.uart4_ctsn */
-                       AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE6)            /* lcd_data13.uart4_rtsn */
+                       AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT_PULLUP, MUX_MODE7)      /* lcd_data12.gpio0[8] */
+                       AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE7)            /* lcd_data13.gpio0[9] */
                        AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE1)             /* uart0_ctsn.uart4_rxd */
                        AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT, MUX_MODE1)            /* uart0_rtsn.uart4_txd */
                >;