venus: firmware: Correct reset bit

The reset bit for A9SS reset register is BIT(4) and for XTSS_SW_RESET
it is BIT(0). Use the defines for those reset bits.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>

diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/platform/qcom/venus/firmware.c
index 14b6f1d05991f263a9ebd8b6f7506630e36e4ab5..3851cedc33299719cc735578ced29e189aa78159 100644 (file)
--- a/drivers/media/platform/qcom/venus/firmware.c
+++ b/drivers/media/platform/qcom/venus/firmware.c
@@ -68,9 +68,11 @@ int venus_set_hw_state(struct venus_core *core, bool resume)
                venus_reset_cpu(core);
        } else {
                if (IS_V6(core))
-                       writel(1, core->wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
+                       writel(WRAPPER_XTSS_SW_RESET_BIT,
+                              core->wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
                else
-                       writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET);
+                       writel(WRAPPER_A9SS_SW_RESET_BIT,
+                              core->wrapper_base + WRAPPER_A9SS_SW_RESET);
        }
 
        return 0;