crypto: octeontx2 - CN10K CPT to RNM workaround
authorSrujana Challa <schalla@marvell.com>
Tue, 25 Jan 2022 18:26:22 +0000 (23:56 +0530)
committerHerbert Xu <herbert@gondor.apana.org.au>
Sat, 5 Feb 2022 04:10:50 +0000 (15:10 +1100)
When software sets CPT_AF_CTL[RNM_REQ_EN]=1 and RNM in not producing
entropy(i.e., RNM_ENTROPY_STATUS[NORMAL_CNT] < 0x40), the first cycle of
the response may be lost due to a conditional clocking issue. Due to
this, the subsequent random number stream will be corrupted. So, this
patch adds support to ensure RNM_ENTROPY_STATUS[NORMAL_CNT] = 0x40
before writing CPT_AF_CTL[RNM_REQ_EN] = 1, as a workaround.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c

index 4c8ebdf671ca8c3a02cc975131583dfac13fdb36..addc760501a95fda929a19ab04d569e5c195dd45 100644 (file)
@@ -1076,6 +1076,39 @@ static void delete_engine_grps(struct pci_dev *pdev,
                delete_engine_group(&pdev->dev, &eng_grps->grp[i]);
 }
 
+#define PCI_DEVID_CN10K_RNM 0xA098
+#define RNM_ENTROPY_STATUS  0x8
+
+static void rnm_to_cpt_errata_fixup(struct device *dev)
+{
+       struct pci_dev *pdev;
+       void __iomem *base;
+       int timeout = 5000;
+
+       pdev = pci_get_device(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10K_RNM, NULL);
+       if (!pdev)
+               return;
+
+       base = pci_ioremap_bar(pdev, 0);
+       if (!base)
+               goto put_pdev;
+
+       while ((readq(base + RNM_ENTROPY_STATUS) & 0x7F) != 0x40) {
+               cpu_relax();
+               udelay(1);
+               timeout--;
+               if (!timeout) {
+                       dev_warn(dev, "RNM is not producing entropy\n");
+                       break;
+               }
+       }
+
+       iounmap(base);
+
+put_pdev:
+       pci_dev_put(pdev);
+}
+
 int otx2_cpt_get_eng_grp(struct otx2_cpt_eng_grps *eng_grps, int eng_type)
 {
 
@@ -1189,9 +1222,17 @@ int otx2_cpt_create_eng_grps(struct otx2_cptpf_dev *cptpf,
 
        if (is_dev_otx2(pdev))
                goto unlock;
+
+       /*
+        * Ensure RNM_ENTROPY_STATUS[NORMAL_CNT] = 0x40 before writing
+        * CPT_AF_CTL[RNM_REQ_EN] = 1 as a workaround for HW errata.
+        */
+       rnm_to_cpt_errata_fixup(&pdev->dev);
+
        /*
         * Configure engine group mask to allow context prefetching
-        * for the groups.
+        * for the groups and enable random number request, to enable
+        * CPT to request random numbers from RNM.
         */
        otx2_cpt_write_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_CTL,
                              OTX2_CPT_ALL_ENG_GRPS_MASK << 3 | BIT_ULL(16),