arm64: dts: amlogic: meson-axg: pinctrl node for NAND
authorArseniy Krasnov <avkrasnov@salutedevices.com>
Thu, 9 Nov 2023 09:45:04 +0000 (12:45 +0300)
committerNeil Armstrong <neil.armstrong@linaro.org>
Mon, 27 Nov 2023 08:13:52 +0000 (09:13 +0100)
Add pinctrl node for the Meson NAND controller.

Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231109094504.131265-1-avkrasnov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
arch/arm64/boot/dts/amlogic/meson-axg.dtsi

index a49aa62e3f9fb7d7fdaea699823a0e3bcc65b862..7e5ac9db93f8a7dae069fc91515b3f26d0f74b9d 100644 (file)
                                        };
                                };
 
+                               nand_all_pins: nand-all-pins {
+                                       mux {
+                                               groups = "emmc_nand_d0",
+                                                        "emmc_nand_d1",
+                                                        "emmc_nand_d2",
+                                                        "emmc_nand_d3",
+                                                        "emmc_nand_d4",
+                                                        "emmc_nand_d5",
+                                                        "emmc_nand_d6",
+                                                        "emmc_nand_d7",
+                                                        "nand_ce0",
+                                                        "nand_ale",
+                                                        "nand_cle",
+                                                        "nand_wen_clk",
+                                                        "nand_ren_wr";
+                                               function = "nand";
+                                               input-enable;
+                                               bias-pull-up;
+                                       };
+                               };
+
                                emmc_ds_pins: emmc_ds {
                                        mux {
                                                groups = "emmc_ds";
                                reg = <0x0 0x7800 0x0 0x100>,
                                      <0x0 0x7000 0x0 0x800>;
                                reg-names = "nfc", "emmc";
+                               pinctrl-0 = <&nand_all_pins>;
+                               pinctrl-names = "default";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;