thermal: intel: intel_tcc_cooling: Detect TCC lock bit

When MSR_IA32_TEMPERATURE_TARGET is locked, TCC Offset can not be
updated even if the PROGRAMMABE Bit is set.

Yield the driver on platforms with MSR_IA32_TEMPERATURE_TARGET locked.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

diff --git a/drivers/thermal/intel/intel_tcc_cooling.c b/drivers/thermal/intel/intel_tcc_cooling.c
index 95adac427b6f1f9f153dc5ef4bc935f2bf29fac2..c9e84e615fce8e23768370a4349198dc8b6413a8 100644 (file)
--- a/drivers/thermal/intel/intel_tcc_cooling.c
+++ b/drivers/thermal/intel/intel_tcc_cooling.c
@@ -14,6 +14,7 @@
 #define TCC_SHIFT 24
 #define TCC_MASK       (0x3fULL<<24)
 #define TCC_PROGRAMMABLE       BIT(30)
+#define TCC_LOCKED             BIT(31)
 
 static struct thermal_cooling_device *tcc_cdev;
 
@@ -108,6 +109,15 @@ static int __init tcc_cooling_init(void)
        if (!(val & TCC_PROGRAMMABLE))
                return -ENODEV;
 
+       err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val);
+       if (err)
+               return err;
+
+       if (val & TCC_LOCKED) {
+               pr_info("TCC Offset locked\n");
+               return -ENODEV;
+       }
+
        pr_info("Programmable TCC Offset detected\n");
 
        tcc_cdev =