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ASoC: codecs: es8316: Add support for 24 MHz MCLK
author
Cezary Rojewski
<cezary.rojewski@intel.com>
Thu, 29 Jun 2023 11:24:42 +0000
(13:24 +0200)
committer
Mark Brown
<broonie@kernel.org>
Sun, 9 Jul 2023 21:47:17 +0000
(22:47 +0100)
MCLK operates on 24MHz on Intel KabyLake-based platforms. To support
that frequency add new MCLK-LRCK ratio.
While at it, utilize ARRAY_SIZE rather than hardcode to improve
robustness.
Cc: Zhu Ning <zhuning@everest-semi.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link:
https://lore.kernel.org/r/20230629112449.1755928-2-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/es8316.c
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diff --git
a/sound/soc/codecs/es8316.c
b/sound/soc/codecs/es8316.c
index 34cf60769b62e19bac7d2cddc2cbcf50a59fdc97..5d1fd505d6ba321c263e13c7ccc5f36b6f032252 100644
(file)
--- a/
sound/soc/codecs/es8316.c
+++ b/
sound/soc/codecs/es8316.c
@@
-27,9
+27,9
@@
* MCLK/LRCK ratios, but we also add ratio 400, which is commonly used on
* Intel Cherry Trail platforms (19.2MHz MCLK, 48kHz LRCK).
*/
-#define NR_SUPPORTED_MCLK_LRCK_RATIOS
6
+#define NR_SUPPORTED_MCLK_LRCK_RATIOS
ARRAY_SIZE(supported_mclk_lrck_ratios)
static const unsigned int supported_mclk_lrck_ratios[] = {
- 256, 384, 400, 512, 768, 1024
+ 256, 384, 400, 5
00, 5
12, 768, 1024
};
struct es8316_priv {