p->hird_threshold_en = false;
 }
 
+static void dwc2_set_amlogic_a1_params(struct dwc2_hsotg *hsotg)
+{
+       struct dwc2_core_params *p = &hsotg->params;
+
+       p->otg_caps.hnp_support = false;
+       p->otg_caps.srp_support = false;
+       p->speed = DWC2_SPEED_PARAM_HIGH;
+       p->host_rx_fifo_size = 192;
+       p->host_nperio_tx_fifo_size = 128;
+       p->host_perio_tx_fifo_size = 128;
+       p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI;
+       p->phy_utmi_width = 8;
+       p->ahbcfg = GAHBCFG_HBSTLEN_INCR8 << GAHBCFG_HBSTLEN_SHIFT;
+       p->lpm = false;
+       p->lpm_clock_gating = false;
+       p->besl = false;
+       p->hird_threshold_en = false;
+}
+
 static void dwc2_set_amcc_params(struct dwc2_hsotg *hsotg)
 {
        struct dwc2_core_params *p = &hsotg->params;
          .data = dwc2_set_amlogic_params },
        { .compatible = "amlogic,meson-g12a-usb",
          .data = dwc2_set_amlogic_g12a_params },
+       { .compatible = "amlogic,meson-a1-usb",
+         .data = dwc2_set_amlogic_a1_params },
        { .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params },
        { .compatible = "apm,apm82181-dwc-otg", .data = dwc2_set_amcc_params },
        { .compatible = "st,stm32f4x9-fsotg",