drm/amd/display: Add dummy interface for tracing DCN32 SMU messages

[Why/How]
Some issues may require a trace of the previous SMU messages from DC to
understand the context and aid in debugging. Actual logging to be
implemented when needed.

Reviewed-by: Josip Pavic <josip.pavic@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
index d9e33c6bccd94dadd7dce94dff5cf6a26a928836..0005f5f8f34f6c32dd1aa9d0330dcd5245ebb593 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
@@ -52,4 +52,12 @@ void dm_perf_trace_timestamp(const char *func_name, unsigned int line, struct dc
                                    func_name, line);
 }
 
+void dm_trace_smu_msg(uint32_t msg_id, uint32_t param_in, struct dc_context *ctx)
+{
+}
+
+void dm_trace_smu_delay(uint32_t delay, struct dc_context *ctx)
+{
+}
+
 /**** power component interfaces ****/

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c
index bdbf183066981aefdcf5cf3dfd6bee85d2bbfcbc..64c2b88dfc9fdcbfc62638574cd0a97b42955268 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c
@@ -54,6 +54,7 @@
  */
 static uint32_t dcn30_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries)
 {
+       const uint32_t initial_max_retries = max_retries;
        uint32_t reg = 0;
 
        do {
@@ -69,7 +70,7 @@ static uint32_t dcn30_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, un
 
        /* handle DALSMC_Result_CmdRejectedBusy? */
 
-       /* Log? */
+       TRACE_SMU_DELAY(delay_us * (initial_max_retries - max_retries), clk_mgr->base.ctx);
 
        return reg;
 }
@@ -89,6 +90,8 @@ static bool dcn30_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint
        /* Trigger the message transaction by writing the message ID */
        REG_WRITE(DAL_MSG_REG, msg_id);
 
+       TRACE_SMU_MSG(msg_id, param_in, clk_mgr->base.ctx);
+
        result = dcn30_smu_wait_for_response(clk_mgr, 10, 200000);
 
        if (IS_SMU_TIMEOUT(result)) {

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c
index df244b175fdb0c0f2e320bde5cfa1b6e61f6e405..f2f60478b1a6bc6abdaa5c2457229359e2113294 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c
@@ -49,6 +49,7 @@
  */
 static uint32_t dcn32_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries)
 {
+       const uint32_t initial_max_retries = max_retries;
        uint32_t reg = 0;
 
        do {
@@ -62,6 +63,8 @@ static uint32_t dcn32_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, un
                        udelay(delay_us);
        } while (max_retries--);
 
+       TRACE_SMU_DELAY(delay_us * (initial_max_retries - max_retries), clk_mgr->base.ctx);
+
        return reg;
 }
 
@@ -79,6 +82,8 @@ static bool dcn32_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint
        /* Trigger the message transaction by writing the message ID */
        REG_WRITE(DAL_MSG_REG, msg_id);
 
+       TRACE_SMU_MSG(msg_id, param_in, clk_mgr->base.ctx);
+
        /* Wait for response */
        if (dcn32_smu_wait_for_response(clk_mgr, 10, 200000) == DALSMC_Result_OK) {
                if (param_out)
@@ -115,6 +120,8 @@ static uint32_t dcn32_smu_wait_for_response_delay(struct clk_mgr_internal *clk_m
                *total_delay_us += delay_us;
        } while (max_retries--);
 
+       TRACE_SMU_DELAY(*total_delay_us, clk_mgr->base.ctx);
+
        return reg;
 }
 
@@ -135,6 +142,8 @@ static bool dcn32_smu_send_msg_with_param_delay(struct clk_mgr_internal *clk_mgr
        /* Trigger the message transaction by writing the message ID */
        REG_WRITE(DAL_MSG_REG, msg_id);
 
+       TRACE_SMU_MSG(msg_id, param_in, clk_mgr->base.ctx);
+
        /* Wait for response */
        if (dcn32_smu_wait_for_response_delay(clk_mgr, 10, 200000, &delay2_us) == DALSMC_Result_OK) {
                if (param_out)

diff --git a/drivers/gpu/drm/amd/display/dc/dm_services.h b/drivers/gpu/drm/amd/display/dc/dm_services.h
index d0eed3b4771e6f1a2e4097db8bb145894c9a0c16..9405c47ee2a9a99a5a5715d1184e08774cd1cb00 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dm_services.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_services.h
@@ -274,6 +274,16 @@ void dm_perf_trace_timestamp(const char *func_name, unsigned int line, struct dc
 #define PERF_TRACE()   dm_perf_trace_timestamp(__func__, __LINE__, CTX)
 #define PERF_TRACE_CTX(__CTX)  dm_perf_trace_timestamp(__func__, __LINE__, __CTX)
 
+/*
+ * SMU message tracing
+ */
+void dm_trace_smu_msg(uint32_t msg_id, uint32_t param_in, struct dc_context *ctx);
+void dm_trace_smu_delay(uint32_t delay, struct dc_context *ctx);
+
+#define TRACE_SMU_MSG(msg_id, param_in, ctx)   dm_trace_smu_msg(msg_id, param_in, ctx)
+#define TRACE_SMU_DELAY(response_delay, ctx)   dm_trace_smu_delay(response_delay, ctx)
+
+
 /*
  * DMUB Interfaces
  */