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Fix for the scd instruction, by Aurelien Jarno.
author
ths
<ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Thu, 10 May 2007 00:51:01 +0000
(
00:51
+0000)
committer
ths
<ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Thu, 10 May 2007 00:51:01 +0000
(
00:51
+0000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2799
c046a42c
-6fe2-441c-8c8c-
71466251a162
target-mips/translate.c
patch
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diff --git
a/target-mips/translate.c
b/target-mips/translate.c
index debe17d7c610c45d33f4683adbe669c9de21669a..449a920a0342bdf621cc43a1a347a3798cba996c 100644
(file)
--- a/
target-mips/translate.c
+++ b/
target-mips/translate.c
@@
-745,6
+745,7
@@
static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt,
save_cpu_state(ctx, 1);
GEN_LOAD_REG_TN(T1, rt);
op_ldst(scd);
+ GEN_STORE_TN_REG(rt, T0);
opn = "scd";
break;
case OPC_LDL: