return (virq) ? : -ENXIO;
}
+static int samsung_add_pin_ranges(struct gpio_chip *gc)
+{
+ struct samsung_pin_bank *bank = gpiochip_get_data(gc);
+
+ bank->grange.name = bank->name;
+ bank->grange.id = bank->id;
+ bank->grange.pin_base = bank->drvdata->pin_base + bank->pin_base;
+ bank->grange.base = gc->base;
+ bank->grange.npins = bank->nr_pins;
+ bank->grange.gc = &bank->gpio_chip;
+ pinctrl_add_gpio_range(bank->drvdata->pctl_dev, &bank->grange);
+
+ return 0;
+}
+
static struct samsung_pin_group *samsung_pinctrl_create_groups(
struct device *dev,
struct samsung_pinctrl_drv_data *drvdata,
/* for each pin, the name of the pin is pin-bank name + pin number */
for (bank = 0; bank < drvdata->nr_banks; bank++) {
pin_bank = &drvdata->pin_banks[bank];
+ pin_bank->id = bank;
for (pin = 0; pin < pin_bank->nr_pins; pin++) {
sprintf(pin_names, "%s-%d", pin_bank->name, pin);
pdesc = pindesc + pin_bank->pin_base + pin;
return ret;
}
- for (bank = 0; bank < drvdata->nr_banks; ++bank) {
- pin_bank = &drvdata->pin_banks[bank];
- pin_bank->grange.name = pin_bank->name;
- pin_bank->grange.id = bank;
- pin_bank->grange.pin_base = drvdata->pin_base
- + pin_bank->pin_base;
- pin_bank->grange.base = pin_bank->grange.pin_base;
- pin_bank->grange.npins = pin_bank->nr_pins;
- pin_bank->grange.gc = &pin_bank->gpio_chip;
- pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
- }
-
return 0;
}
.direction_input = samsung_gpio_direction_input,
.direction_output = samsung_gpio_direction_output,
.to_irq = samsung_gpio_to_irq,
+ .add_pin_ranges = samsung_add_pin_ranges,
.owner = THIS_MODULE,
};
bank->gpio_chip = samsung_gpiolib_chip;
gc = &bank->gpio_chip;
- gc->base = bank->grange.base;
+ gc->base = drvdata->pin_base + bank->pin_base;
gc->ngpio = bank->nr_pins;
gc->parent = &pdev->dev;
gc->fwnode = bank->fwnode;
* @eint_mask: bit mask of pins which support EINT function.
* @eint_offset: SoC-specific EINT register or interrupt offset of bank.
* @name: name to be prefixed for each pin in this pin bank.
+ * @id: id of the bank, propagated to the pin range.
* @pin_base: starting pin number of the bank.
* @soc_priv: per-bank private data for SoC-specific code.
* @of_node: OF node of the bank.
u32 eint_mask;
u32 eint_offset;
const char *name;
+ u32 id;
u32 pin_base;
void *soc_priv;