drm/amd/display: Update scaler recout data for visual confirm

[Why]
Visual confirm color is not as expected for Autoa Color Management
feature test.

[How]
Calculate scaler recout data when visual confirm enabled to update
the visual confirm bar on the display.

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Leo Ma <hanghong.ma@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index de3b891cba51f957399f9fe15d2cb3990e935f53..2d8a8c8ff47d4e300fe0aa3703047ef5f1abd0a9 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -4304,7 +4304,8 @@ static bool full_update_required(struct dc_surface_update *srf_updates,
                                srf_updates[i].in_transfer_func ||
                                srf_updates[i].func_shaper ||
                                srf_updates[i].lut3d_func ||
-                               srf_updates[i].blend_tf))
+                               srf_updates[i].blend_tf ||
+                               srf_updates[i].surface->force_full_update))
                        return true;
        }
 

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 2f3d9a698486d2d4461bb2da749a64f082c1a5f9..1859350dffc6935c4d6f4b9a91638f5159cd8feb 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -69,6 +69,9 @@
 #include "../dcn32/dcn32_resource.h"
 #include "../dcn321/dcn321_resource.h"
 
+#define VISUAL_CONFIRM_RECT_HEIGHT_DEFAULT 3
+#define VISUAL_CONFIRM_RECT_HEIGHT_MIN 1
+#define VISUAL_CONFIRM_RECT_HEIGHT_MAX 10
 
 #define DC_LOGGER_INIT(logger)
 
@@ -808,6 +811,8 @@ static void calculate_recout(struct pipe_ctx *pipe_ctx)
        struct rect surf_clip = plane_state->clip_rect;
        bool split_tb = stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM;
        int split_count, split_idx;
+       struct dpp *dpp = pipe_ctx->plane_res.dpp;
+       unsigned short visual_confirm_rect_height = VISUAL_CONFIRM_RECT_HEIGHT_DEFAULT;
 
        calculate_split_count_and_index(pipe_ctx, &split_count, &split_idx);
        if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE)
@@ -876,6 +881,23 @@ static void calculate_recout(struct pipe_ctx *pipe_ctx)
                                data->recout.width = data->h_active - data->recout.x;
                }
        }
+
+       /* Check bounds to ensure the VC bar height was set to a sane value */
+       if (dpp != NULL) {
+               if ((dpp->ctx->dc->debug.visual_confirm_rect_height >= VISUAL_CONFIRM_RECT_HEIGHT_MIN) &&
+                       (dpp->ctx->dc->debug.visual_confirm_rect_height <= VISUAL_CONFIRM_RECT_HEIGHT_MAX)) {
+                       visual_confirm_rect_height = dpp->ctx->dc->debug.visual_confirm_rect_height;
+               }
+
+               if (dpp->ctx->dc->debug.visual_confirm !=
+                   VISUAL_CONFIRM_DISABLE)
+                       data->recout.height = data->recout.height -
+                               2 * ((pipe_ctx->prev_odm_pipe ||
+                                     (pipe_ctx->top_pipe &&
+                                     pipe_ctx->top_pipe->plane_state ==
+                                     pipe_ctx->plane_state)) +
+                                    visual_confirm_rect_height);
+       }
 }
 
 static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
index b33955928bd0b8e0158219b3ca2f837533622af3..7e140c35a0ced724097c0f26b880b21d0d8d98a8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
@@ -39,9 +39,6 @@
 #define BLACK_OFFSET_RGB_Y 0x0
 #define BLACK_OFFSET_CBCR  0x8000
 
-#define VISUAL_CONFIRM_RECT_HEIGHT_DEFAULT 3
-#define VISUAL_CONFIRM_RECT_HEIGHT_MIN 1
-#define VISUAL_CONFIRM_RECT_HEIGHT_MAX 10
 
 #define REG(reg)\
        dpp->tf_regs->reg
@@ -591,18 +588,6 @@ static void dpp1_dscl_set_manual_ratio_init(
 static void dpp1_dscl_set_recout(struct dcn10_dpp *dpp,
                                 const struct rect *recout)
 {
-       int visual_confirm_on = 0;
-       unsigned short visual_confirm_rect_height = VISUAL_CONFIRM_RECT_HEIGHT_DEFAULT;
-
-       if (dpp->base.ctx->dc->debug.visual_confirm != VISUAL_CONFIRM_DISABLE)
-               visual_confirm_on = 1;
-
-       /* Check bounds to ensure the VC bar height was set to a sane value */
-       if ((dpp->base.ctx->dc->debug.visual_confirm_rect_height >= VISUAL_CONFIRM_RECT_HEIGHT_MIN) &&
-                       (dpp->base.ctx->dc->debug.visual_confirm_rect_height <= VISUAL_CONFIRM_RECT_HEIGHT_MAX)) {
-               visual_confirm_rect_height = dpp->base.ctx->dc->debug.visual_confirm_rect_height;
-       }
-
        REG_SET_2(RECOUT_START, 0,
                  /* First pixel of RECOUT in the active OTG area */
                  RECOUT_START_X, recout->x,
@@ -613,8 +598,7 @@ static void dpp1_dscl_set_recout(struct dcn10_dpp *dpp,
                  /* Number of RECOUT horizontal pixels */
                  RECOUT_WIDTH, recout->width,
                  /* Number of RECOUT vertical lines */
-                 RECOUT_HEIGHT, recout->height
-                        - visual_confirm_on * 2 * (dpp->base.inst + visual_confirm_rect_height));
+                 RECOUT_HEIGHT, recout->height);
 }
 
 /**