static void
 bnx2_enable_int(struct bnx2 *bp)
 {
-       u32 val;
-
        REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
               BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID |
               BNX2_PCICFG_INT_ACK_CMD_MASK_INT | bp->last_status_idx);
        REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
               BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | bp->last_status_idx);
 
-       val = REG_RD(bp, BNX2_HC_COMMAND);
-       REG_WR(bp, BNX2_HC_COMMAND, val | BNX2_HC_COMMAND_COAL_NOW);
+       REG_WR(bp, BNX2_HC_COMMAND, bp->hc_cmd | BNX2_HC_COMMAND_COAL_NOW);
 }
 
 static void
                spin_lock(&bp->phy_lock);
                bnx2_phy_int(bp);
                spin_unlock(&bp->phy_lock);
+
+               /* This is needed to take care of transient status
+                * during link changes.
+                */
+               REG_WR(bp, BNX2_HC_COMMAND,
+                      bp->hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
+               REG_RD(bp, BNX2_HC_COMMAND);
        }
 
        if (bp->status_blk->status_tx_quick_consumer_index0 != bp->hw_tx_cons)
 
        udelay(20);
 
+       bp->hc_cmd = REG_RD(bp, BNX2_HC_COMMAND);
+
        return rc;
 }
 
        struct sk_buff *skb, *rx_skb;
        unsigned char *packet;
        u16 rx_start_idx, rx_idx;
-       u32 val;
        dma_addr_t map;
        struct tx_bd *txbd;
        struct sw_bd *rx_buf;
        map = pci_map_single(bp->pdev, skb->data, pkt_size,
                PCI_DMA_TODEVICE);
 
-       val = REG_RD(bp, BNX2_HC_COMMAND);
-       REG_WR(bp, BNX2_HC_COMMAND, val | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
+       REG_WR(bp, BNX2_HC_COMMAND,
+              bp->hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
+
        REG_RD(bp, BNX2_HC_COMMAND);
 
        udelay(5);
 
        udelay(100);
 
-       val = REG_RD(bp, BNX2_HC_COMMAND);
-       REG_WR(bp, BNX2_HC_COMMAND, val | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
+       REG_WR(bp, BNX2_HC_COMMAND,
+              bp->hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
+
        REG_RD(bp, BNX2_HC_COMMAND);
 
        udelay(5);
 bnx2_test_intr(struct bnx2 *bp)
 {
        int i;
-       u32 val;
        u16 status_idx;
 
        if (!netif_running(bp->dev))
        status_idx = REG_RD(bp, BNX2_PCICFG_INT_ACK_CMD) & 0xffff;
 
        /* This register is not touched during run-time. */
-       val = REG_RD(bp, BNX2_HC_COMMAND);
-       REG_WR(bp, BNX2_HC_COMMAND, val | BNX2_HC_COMMAND_COAL_NOW);
+       REG_WR(bp, BNX2_HC_COMMAND, bp->hc_cmd | BNX2_HC_COMMAND_COAL_NOW);
        REG_RD(bp, BNX2_HC_COMMAND);
 
        for (i = 0; i < 10; i++) {