arm64: dts: imx8dxl-evk: add flexcan2 and flecan3

Add flexcan2 and flexcan3 for imx8dxl-evk board.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index 44da3cc331d84574dc9ddfc72ee44623fe05fd1c..2123d431e061374fa7ee154c279b101b5c404433 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
@@ -81,6 +81,24 @@
                status = "disabled";
        };
 
+       reg_can0_stby: regulator-4 {
+               compatible = "regulator-fixed";
+               regulator-name = "can0-stby";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&pca6416_3 0 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       reg_can1_stby: regulator-5 {
+               compatible = "regulator-fixed";
+               regulator-name = "can1-stby";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&pca6416_3 1 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
        reg_usdhc2_vmmc: regulator-3 {
                compatible = "regulator-fixed";
                regulator-name = "SD1_SPWR";
@@ -322,6 +340,20 @@
        status = "okay";
 };
 
+&flexcan2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan2>;
+       xceiver-supply = <&reg_can0_stby>;
+       status = "okay";
+};
+
+&flexcan3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan3>;
+       xceiver-supply = <&reg_can1_stby>;
+       status = "okay";
+};
+
 &lsio_gpio4 {
        status = "okay";
 };
@@ -491,6 +523,20 @@
                >;
        };
 
+       pinctrl_flexcan2: flexcan2grp {
+               fsl,pins = <
+                       IMX8DXL_UART2_TX_ADMA_FLEXCAN1_TX       0x00000021
+                       IMX8DXL_UART2_RX_ADMA_FLEXCAN1_RX       0x00000021
+               >;
+       };
+
+       pinctrl_flexcan3: flexcan3grp {
+               fsl,pins = <
+                       IMX8DXL_FLEXCAN2_TX_ADMA_FLEXCAN2_TX    0x00000021
+                       IMX8DXL_FLEXCAN2_RX_ADMA_FLEXCAN2_RX    0x00000021
+               >;
+       };
+
        pinctrl_fec1: fec1grp {
                fsl,pins = <
                        IMX8DXL_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD           0x000014a0