arm64: dts: nxp: add ls1046a-frwy board support

ls1046afrwy board is based on nxp ls1046a SoC.
Board support's 4GB ddr memory, i2c, microSD card,
serial console,qspi nor flash,ifc nand flash,qsgmii network interface,
usb 3.0 and serdes interface to support two x1gen3 pcie interface.

Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index c043aca665726c09eb595a43da2fa0d8b588b8a6..23cfd2710196a3db24d15c5b6410ca14a305e6f7 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy.dts
new file mode 100644 (file)
index 0000000..3595be0
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy.dts
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree Include file for Freescale Layerscape-1046A family SoC.
+ *
+ * Copyright 2019 NXP.
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls1046a.dtsi"
+
+/ {
+       model = "LS1046A FRWY Board";
+       compatible = "fsl,ls1046a-frwy", "fsl,ls1046a";
+
+       aliases {
+               serial0 = &duart0;
+               serial1 = &duart1;
+               serial2 = &duart2;
+               serial3 = &duart3;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       sb_3v3: regulator-sb3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "LT8642SEV-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+};
+
+&duart0 {
+       status = "okay";
+};
+
+&duart1 {
+       status = "okay";
+};
+
+&duart2 {
+       status = "okay";
+};
+
+&duart3 {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+
+       i2c-mux@77 {
+               compatible = "nxp,pca9546";
+               reg = <0x77>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+
+                       power-monitor@40 {
+                               compatible = "ti,ina220";
+                               reg = <0x40>;
+                               shunt-resistor = <1000>;
+                       };
+
+                       temperature-sensor@4c {
+                               compatible = "nxp,sa56004";
+                               reg = <0x4c>;
+                               vcc-supply = <&sb_3v3>;
+                       };
+
+                       rtc@51 {
+                               compatible = "nxp,pcf2129";
+                               reg = <0x51>;
+                       };
+
+                       eeprom@52 {
+                               compatible = "atmel,24c512";
+                               reg = <0x52>;
+                       };
+
+                       eeprom@53 {
+                               compatible = "atmel,24c512";
+                               reg = <0x53>;
+                       };
+
+               };
+       };
+};
+
+&ifc {
+       #address-cells = <2>;
+       #size-cells = <1>;
+       /* NAND Flash */
+       ranges = <0x0 0x0 0x0 0x7e800000 0x00010000>;
+       status = "okay";
+
+       nand@0,0 {
+               compatible = "fsl,ifc-nand";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               reg = <0x0 0x0 0x10000>;
+       };
+
+};
+
+#include "fsl-ls1046-post.dtsi"
+
+&fman0 {
+       ethernet@e0000 {
+               phy-handle = <&qsgmii_phy4>;
+               phy-connection-type = "qsgmii";
+       };
+
+       ethernet@e8000 {
+               phy-handle = <&qsgmii_phy2>;
+               phy-connection-type = "qsgmii";
+       };
+
+       ethernet@ea000 {
+               phy-handle = <&qsgmii_phy1>;
+               phy-connection-type = "qsgmii";
+       };
+
+       ethernet@f2000 {
+               phy-handle = <&qsgmii_phy3>;
+               phy-connection-type = "qsgmii";
+       };
+
+       mdio@fd000 {
+               qsgmii_phy1: ethernet-phy@1c {
+                       reg = <0x1c>;
+               };
+
+               qsgmii_phy2: ethernet-phy@1d {
+                       reg = <0x1d>;
+               };
+
+               qsgmii_phy3: ethernet-phy@1e {
+                       reg = <0x1e>;
+               };
+
+               qsgmii_phy4: ethernet-phy@1f {
+                       reg = <0x1f>;
+               };
+       };
+};