dt-bindings: arm-smmu: Document nvidia,memory-controller property
authorThierry Reding <treding@nvidia.com>
Fri, 29 Apr 2022 08:22:41 +0000 (10:22 +0200)
committerWill Deacon <will@kernel.org>
Fri, 6 May 2022 15:29:27 +0000 (16:29 +0100)
On NVIDIA SoC's the ARM SMMU needs to interact with the memory
controller in order to map memory clients to the corresponding stream
IDs. Document how the nvidia,memory-controller property can be used to
achieve this.

Note that this is a backwards-incompatible change that is, however,
necessary to ensure correctness. Without the new property, most of the
devices would still work but it is not guaranteed that all will.

Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20220429082243.496000-2-thierry.reding@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
Documentation/devicetree/bindings/iommu/arm,smmu.yaml

index 96891576a575e3611cf979c4ab7b3668f64c4411..ffd537a94a15009e5e12921940db5083d30a25fa 100644 (file)
@@ -159,6 +159,17 @@ properties:
   power-domains:
     maxItems: 1
 
+  nvidia,memory-controller:
+    description: |
+      A phandle to the memory controller on NVIDIA Tegra186 and later SoCs.
+      The memory controller needs to be programmed with a mapping of memory
+      client IDs to ARM SMMU stream IDs.
+
+      If this property is absent, the mapping programmed by early firmware
+      will be used and it is not guaranteed that IOMMU translations will be
+      enabled for any given device.
+    $ref: /schemas/types.yaml#/definitions/phandle
+
 required:
   - compatible
   - reg
@@ -181,6 +192,12 @@ allOf:
         reg:
           minItems: 1
           maxItems: 2
+
+      # The reference to the memory controller is required to ensure that the
+      # memory client to stream ID mapping can be done synchronously with the
+      # IOMMU attachment.
+      required:
+        - nvidia,memory-controller
     else:
       properties:
         reg: