arm64: dts: qcom: msm8998: Configure the MultiMedia Clock Controller (MMCC)
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Wed, 1 Sep 2021 18:31:19 +0000 (20:31 +0200)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Tue, 21 Sep 2021 22:37:05 +0000 (17:37 -0500)
The MSM8998 MMCC is supported and has a driver: configure it as a
preparation for a later enablement of multimedia nodes (mdp, venus
and others).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210901183123.1087392-1-angelogioacchino.delregno@somainline.org
arch/arm64/boot/dts/qcom/msm8998.dtsi

index d284ffe9bd71de68aeb97da4e2ccaee675ee3d01..0d8c4437246b373000a2338c17c355ab7c46c9b8 100644 (file)
@@ -4,6 +4,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
+#include <dt-bindings/clock/qcom,mmcc-msm8998.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/gpio/gpio.h>
                        #size-cells = <0>;
                };
 
+               mmcc: clock-controller@c8c0000 {
+                       compatible = "qcom,mmcc-msm8998";
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #power-domain-cells = <1>;
+                       reg = <0xc8c0000 0x40000>;
+                       status = "disabled";
+
+                       clock-names = "xo",
+                                     "gpll0",
+                                     "dsi0dsi",
+                                     "dsi0byte",
+                                     "dsi1dsi",
+                                     "dsi1byte",
+                                     "hdmipll",
+                                     "dplink",
+                                     "dpvco",
+                                     "core_bi_pll_test_se";
+                       clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+                                <&gcc GCC_MMSS_GPLL0_CLK>,
+                                <0>,
+                                <0>,
+                                <0>,
+                                <0>,
+                                <0>,
+                                <0>,
+                                <0>,
+                                <0>;
+               };
+
                remoteproc_adsp: remoteproc@17300000 {
                        compatible = "qcom,msm8998-adsp-pas";
                        reg = <0x17300000 0x4040>;