drm/amdgpu: The I2C IP doesn't support 0 writes/reads
authorLuben Tuikov <luben.tuikov@amd.com>
Fri, 2 Jul 2021 23:58:42 +0000 (19:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 8 Jul 2021 19:12:51 +0000 (15:12 -0400)
The I2C IP doesn't support writes or reads of 0 bytes.

In order for a START/STOP transaction to take
place on the bus, the data written/read has to be
at least one byte.

That is, you cannot generate a write with 0 bytes,
just to get the ACK from a device, just so you can
probe that device if it is on the bus and so to
discover all devices on the bus--you'll have to
read at least one byte. Writes of 0 bytes generate
no START/STOP on this I2C IP--the bus is not
engaged at all.

Set the I2C_AQ_NO_ZERO_LEN to the existing I2C
quirk tables for Aldebaran, Arcturus, Navi10 and
Sienna Cichlid, and add a quirk table to the I2C
driver which drives the bus when the SMU
doesn't--for instance on Vega20.

Cc: Alexander Deucher <Alexander.Deucher@amd.com>
Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Cc: Lijo Lazar <Lijo.Lazar@amd.com>
Cc: John Clements <john.clements@amd.com>
Cc: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Lijo Lazar <Lijo.Lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c
drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

index 7d74d6204d8d0a43b7857e1469b7a2963c74b736..73ffa8fde3df3f3fbc2d1abf79651c87c6b68329 100644 (file)
@@ -702,6 +702,10 @@ static const struct i2c_algorithm smu_v11_0_i2c_algo = {
        .functionality = smu_v11_0_i2c_func,
 };
 
+static const struct i2c_adapter_quirks smu_v11_0_i2c_control_quirks = {
+       .flags = I2C_AQ_NO_ZERO_LEN,
+};
+
 int smu_v11_0_i2c_control_init(struct i2c_adapter *control)
 {
        struct amdgpu_device *adev = to_amdgpu_device(control);
@@ -714,6 +718,7 @@ int smu_v11_0_i2c_control_init(struct i2c_adapter *control)
        control->algo = &smu_v11_0_i2c_algo;
        snprintf(control->name, sizeof(control->name), "AMDGPU SMU");
        control->lock_ops = &smu_v11_0_i2c_i2c_lock_ops;
+       control->quirks = &smu_v11_0_i2c_control_quirks;
 
        res = i2c_add_adapter(control);
        if (res)
index b1adbe17b6c2d48d7645c8def66ff870944bc979..6b3e0ea10163a1c3a3d2d516bed0f4a05c0da2ec 100644 (file)
@@ -2022,7 +2022,7 @@ static const struct i2c_algorithm arcturus_i2c_algo = {
 
 
 static const struct i2c_adapter_quirks arcturus_i2c_control_quirks = {
-       .flags = I2C_AQ_COMB | I2C_AQ_COMB_SAME_ADDR,
+       .flags = I2C_AQ_COMB | I2C_AQ_COMB_SAME_ADDR | I2C_AQ_NO_ZERO_LEN,
        .max_read_len  = MAX_SW_I2C_COMMANDS,
        .max_write_len = MAX_SW_I2C_COMMANDS,
        .max_comb_1st_msg_len = 2,
index 36264b781996201866c8cbbb13fe945daa34de27..59ea59acfb00ffb0c851cbe760cee727ff791f31 100644 (file)
@@ -2820,7 +2820,7 @@ static const struct i2c_algorithm navi10_i2c_algo = {
 };
 
 static const struct i2c_adapter_quirks navi10_i2c_control_quirks = {
-       .flags = I2C_AQ_COMB | I2C_AQ_COMB_SAME_ADDR,
+       .flags = I2C_AQ_COMB | I2C_AQ_COMB_SAME_ADDR | I2C_AQ_NO_ZERO_LEN,
        .max_read_len  = MAX_SW_I2C_COMMANDS,
        .max_write_len = MAX_SW_I2C_COMMANDS,
        .max_comb_1st_msg_len = 2,
index 0c3407025eb29f6639d162075337eaa0e44b2f4a..fb5b3ea6127342e5ef5a1efbdf60afd8c3f68e35 100644 (file)
@@ -3527,7 +3527,7 @@ static const struct i2c_algorithm sienna_cichlid_i2c_algo = {
 };
 
 static const struct i2c_adapter_quirks sienna_cichlid_i2c_control_quirks = {
-       .flags = I2C_AQ_COMB | I2C_AQ_COMB_SAME_ADDR,
+       .flags = I2C_AQ_COMB | I2C_AQ_COMB_SAME_ADDR | I2C_AQ_NO_ZERO_LEN,
        .max_read_len  = MAX_SW_I2C_COMMANDS,
        .max_write_len = MAX_SW_I2C_COMMANDS,
        .max_comb_1st_msg_len = 2,
index c1c7aefa9d8fdc11c47f5642b907e16cd3fbb5b0..c16ca0c78e9306695f0b5fdc6e1e015182583eaf 100644 (file)
@@ -1510,7 +1510,7 @@ static const struct i2c_algorithm aldebaran_i2c_algo = {
 };
 
 static const struct i2c_adapter_quirks aldebaran_i2c_control_quirks = {
-       .flags = I2C_AQ_COMB | I2C_AQ_COMB_SAME_ADDR,
+       .flags = I2C_AQ_COMB | I2C_AQ_COMB_SAME_ADDR | I2C_AQ_NO_ZERO_LEN,
        .max_read_len  = MAX_SW_I2C_COMMANDS,
        .max_write_len = MAX_SW_I2C_COMMANDS,
        .max_comb_1st_msg_len = 2,