arm64: dts: qcom: msm8953: add APPS IOMMU

Add the nodes describing the iommu and its context banks that are found
on msm8953 SoCs.

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221016161554.673006-3-luca@z3ntu.xyz

diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index db94e6fd18f53d29d987603fb803f4f02d2282da..5fa2d5b9ee06dea858bd5e0b3edf7ca701dde56e 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -726,6 +726,42 @@
                        reg = <0x193f044 0x4>;
                };
 
+               apps_iommu: iommu@1e00000 {
+                       compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v1";
+                       ranges  = <0 0x1e20000 0x20000>;
+
+                       clocks = <&gcc GCC_SMMU_CFG_CLK>,
+                                <&gcc GCC_APSS_TCU_ASYNC_CLK>;
+                       clock-names = "iface", "bus";
+
+                       qcom,iommu-secure-id = <17>;
+
+                       #address-cells = <1>;
+                       #iommu-cells = <1>;
+                       #size-cells = <1>;
+
+                       // vfe
+                       iommu-ctx@14000 {
+                               compatible = "qcom,msm-iommu-v1-ns";
+                               reg = <0x14000 0x1000>;
+                               interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+
+                       // mdp_0
+                       iommu-ctx@15000 {
+                               compatible = "qcom,msm-iommu-v1-ns";
+                               reg = <0x15000 0x1000>;
+                               interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+
+                       // venus_ns
+                       iommu-ctx@16000 {
+                               compatible = "qcom,msm-iommu-v1-ns";
+                               reg = <0x16000 0x1000>;
+                               interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+               };
+
                spmi_bus: spmi@200f000 {
                        compatible = "qcom,spmi-pmic-arb";
                        reg = <0x200f000 0x1000>,