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ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for UART2 RX/TX
author
Icenowy Zheng
<icenowy@aosc.io>
Wed, 23 Sep 2020 00:58:53 +0000
(08:58 +0800)
committer
Maxime Ripard
<maxime@cerno.tech>
Mon, 28 Sep 2020 10:09:22 +0000
(12:09 +0200)
The UART2 RX/TX pins on Allwinner V3 series is at PB0/1, which is used
as debugging UART on some boards.
Add pinctrl node for them.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link:
https://lore.kernel.org/r/20200923005858.148261-1-icenowy@aosc.io
arch/arm/boot/dts/sun8i-v3s.dtsi
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diff --git
a/arch/arm/boot/dts/sun8i-v3s.dtsi
b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 7d40897dab09330c6ff3f2798ab9113685ac6d17..4cfdf193cf88ec15d3fb02f9f221b8b19a794bf0 100644
(file)
--- a/
arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/
arch/arm/boot/dts/sun8i-v3s.dtsi
@@
-322,6
+322,11
@@
function = "uart0";
};
+ uart2_pins: uart2-pins {
+ pins = "PB0", "PB1";
+ function = "uart2";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@@
-397,6
+402,8
@@
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu RST_BUS_UART2>;
+ pinctrl-0 = <&uart2_pins>;
+ pinctrl-names = "default";
status = "disabled";
};