drm/amdgpu: Skip the program of MMMC_VM_AGP_* in SRIOV on MMHUB v3_0_0
authorYifan Zha <Yifan.Zha@amd.com>
Wed, 27 Jul 2022 05:43:50 +0000 (13:43 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 1 Sep 2022 19:11:35 +0000 (15:11 -0400)
[Why]
VF should not program these registers, the value were defined in the host.

[How]
Skip writing them in SRIOV environment and program them on host side.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

index bc11b2de37aebb7cbeddf76e4a1a5d2cc826dbff..a1d26c4d80b8c7802e70ffd881a6b252e9ded6fa 100644 (file)
@@ -169,17 +169,17 @@ static void mmhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
        uint64_t value;
        uint32_t tmp;
 
-       /* Disable AGP. */
-       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
-       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
-       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
-
        if (!amdgpu_sriov_vf(adev)) {
                /*
                 * the new L1 policy will block SRIOV guest from writing
                 * these regs, and they will be programed at host.
                 * so skip programing these regs.
                 */
+               /* Disable AGP. */
+               WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
+               WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
+               WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
+
                /* Program the system aperture low logical page number. */
                WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,
                             adev->gmc.vram_start >> 18);