arm64: dts: qcom: ipq6018: Fix up indentation

The dwc3 subnode was indented using spaces for some reason and other
properties were not exactly properly indented. Fix it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-3-konrad.dybcio@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 6f12c1a8f90f365c18a0ac57aa5b8ba8e2119c60..d1c02efc2ea9fc24e5f306919c14cf3490a58801 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -201,8 +201,8 @@
                        compatible = "qcom,crypto-v5.1";
                        reg = <0x0 0x0073a000 0x0 0x6000>;
                        clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
-                               <&gcc GCC_CRYPTO_AXI_CLK>,
-                               <&gcc GCC_CRYPTO_CLK>;
+                                <&gcc GCC_CRYPTO_AXI_CLK>,
+                                <&gcc GCC_CRYPTO_CLK>;
                        clock-names = "iface", "bus", "core";
                        dmas = <&cryptobam 2>, <&cryptobam 3>;
                        dma-names = "rx", "tx";
@@ -272,7 +272,7 @@
                        reg = <0x0 0x078b1000 0x0 0x200>;
                        interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
-                               <&gcc GCC_BLSP1_AHB_CLK>;
+                                <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
                        status = "disabled";
                };
@@ -285,7 +285,7 @@
                        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
                        spi-max-frequency = <50000000>;
                        clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
-                               <&gcc GCC_BLSP1_AHB_CLK>;
+                                <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
                        dmas = <&blsp_dma 12>, <&blsp_dma 13>;
                        dma-names = "tx", "rx";
@@ -300,7 +300,7 @@
                        interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
                        spi-max-frequency = <50000000>;
                        clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
-                               <&gcc GCC_BLSP1_AHB_CLK>;
+                                <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
                        dmas = <&blsp_dma 14>, <&blsp_dma 15>;
                        dma-names = "tx", "rx";
@@ -358,8 +358,8 @@
                        clock-names = "core", "aon";
 
                        dmas = <&qpic_bam 0>,
-                               <&qpic_bam 1>,
-                               <&qpic_bam 2>;
+                              <&qpic_bam 1>,
+                              <&qpic_bam 2>;
                        dma-names = "tx", "rx", "cmd";
                        pinctrl-0 = <&qpic_pins>;
                        pinctrl-names = "default";
@@ -372,10 +372,10 @@
                        #size-cells = <2>;
                        interrupt-controller;
                        #interrupt-cells = <0x3>;
-                       reg =   <0x0 0x0b000000 0x0 0x1000>,  /*GICD*/
-                               <0x0 0x0b002000 0x0 0x1000>,  /*GICC*/
-                               <0x0 0x0b001000 0x0 0x1000>,  /*GICH*/
-                               <0x0 0x0b004000 0x0 0x1000>;  /*GICV*/
+                       reg = <0x0 0x0b000000 0x0 0x1000>,  /*GICD*/
+                             <0x0 0x0b002000 0x0 0x1000>,  /*GICC*/
+                             <0x0 0x0b001000 0x0 0x1000>,  /*GICH*/
+                             <0x0 0x0b004000 0x0 0x1000>;  /*GICV*/
                        interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
                        ranges = <0 0 0 0xb00a000 0 0xffd>;
 
@@ -663,17 +663,17 @@
                        status = "disabled";
 
                        dwc_1: usb@7000000 {
-                              compatible = "snps,dwc3";
-                              reg = <0x0 0x07000000 0x0 0xcd00>;
-                              interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
-                              phys = <&qusb_phy_1>;
-                              phy-names = "usb2-phy";
-                              tx-fifo-resize;
-                              snps,is-utmi-l1-suspend;
-                              snps,hird-threshold = /bits/ 8 <0x0>;
-                              snps,dis_u2_susphy_quirk;
-                              snps,dis_u3_susphy_quirk;
-                              dr_mode = "host";
+                               compatible = "snps,dwc3";
+                               reg = <0x0 0x07000000 0x0 0xcd00>;
+                               interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
+                               phys = <&qusb_phy_1>;
+                               phy-names = "usb2-phy";
+                               tx-fifo-resize;
+                               snps,is-utmi-l1-suspend;
+                               snps,hird-threshold = /bits/ 8 <0x0>;
+                               snps,dis_u2_susphy_quirk;
+                               snps,dis_u3_susphy_quirk;
+                               dr_mode = "host";
                        };
                };