RDMA/hns: Clean definitions of EQC structure

Remove unused members in EQ context structure.

Fixes: 782832f25404 ("RDMA/hns: Simplify the function config_eqc()")
Link: https://lore.kernel.org/r/1624011020-16992-7-git-send-email-liweihang@huawei.com
Signed-off-by: Xi Wang <wangxi11@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index 04b4ad48a80389ff8b92ebe1af6cef387711057c..7ae9781c4d1095c25f7de730e7c8acf8200cc544 100644 (file)
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -1443,21 +1443,6 @@ struct hns_roce_v2_priv {
        struct hns_roce_link_table ext_llm;
 };
 
-struct hns_roce_eq_context {
-       __le32  byte_4;
-       __le32  byte_8;
-       __le32  byte_12;
-       __le32  eqe_report_timer;
-       __le32  eqe_ba0;
-       __le32  eqe_ba1;
-       __le32  byte_28;
-       __le32  byte_32;
-       __le32  byte_36;
-       __le32  byte_40;
-       __le32  byte_44;
-       __le32  rsv[5];
-};
-
 struct hns_roce_dip {
        u8 dgid[GID_LEN_V2];
        u8 dip_idx;
@@ -1519,6 +1504,10 @@ struct hns_roce_dip {
 #define HNS_ROCE_V2_VF_ABN_INT_CFG_M GENMASK(2, 0)
 #define HNS_ROCE_V2_VF_EVENT_INT_EN_M GENMASK(0, 0)
 
+struct hns_roce_eq_context {
+       __le32  data[16];
+};
+
 #define EQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_eq_context, h, l)
 
 #define EQC_EQ_ST EQC_FIELD_LOC(1, 0)