arm64: dts: qcom: sm8350: Supply clock from cpufreq node to CPUs
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Wed, 15 Feb 2023 07:03:57 +0000 (12:33 +0530)
committerBjorn Andersson <andersson@kernel.org>
Wed, 15 Mar 2023 02:30:47 +0000 (19:30 -0700)
Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks
to the CPU cores. But this relationship is not represented in DTS so far.

So let's make cpufreq node as the clock provider and CPU nodes as the
consumers. The clock index for each CPU node is based on the frequency
domain index.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230215070400.5901-10-manivannan.sadhasivam@linaro.org
arch/arm64/boot/dts/qcom/sm8350.dtsi

index 1c97e28da6ad85467e99eab74e520e05be1daa15..e52deb2ccfb526e2ced1b96d6bc12a0a8d8a709e 100644 (file)
@@ -49,6 +49,7 @@
                        device_type = "cpu";
                        compatible = "qcom,kryo685";
                        reg = <0x0 0x0>;
+                       clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        next-level-cache = <&L2_0>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
@@ -70,6 +71,7 @@
                        device_type = "cpu";
                        compatible = "qcom,kryo685";
                        reg = <0x0 0x100>;
+                       clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        next-level-cache = <&L2_100>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
@@ -87,6 +89,7 @@
                        device_type = "cpu";
                        compatible = "qcom,kryo685";
                        reg = <0x0 0x200>;
+                       clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        next-level-cache = <&L2_200>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        device_type = "cpu";
                        compatible = "qcom,kryo685";
                        reg = <0x0 0x300>;
+                       clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        next-level-cache = <&L2_300>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        device_type = "cpu";
                        compatible = "qcom,kryo685";
                        reg = <0x0 0x400>;
+                       clocks = <&cpufreq_hw 1>;
                        enable-method = "psci";
                        next-level-cache = <&L2_400>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        device_type = "cpu";
                        compatible = "qcom,kryo685";
                        reg = <0x0 0x500>;
+                       clocks = <&cpufreq_hw 1>;
                        enable-method = "psci";
                        next-level-cache = <&L2_500>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        device_type = "cpu";
                        compatible = "qcom,kryo685";
                        reg = <0x0 0x600>;
+                       clocks = <&cpufreq_hw 1>;
                        enable-method = "psci";
                        next-level-cache = <&L2_600>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        device_type = "cpu";
                        compatible = "qcom,kryo685";
                        reg = <0x0 0x700>;
+                       clocks = <&cpufreq_hw 2>;
                        enable-method = "psci";
                        next-level-cache = <&L2_700>;
                        qcom,freq-domain = <&cpufreq_hw 2>;
                        clock-names = "xo", "alternate";
 
                        #freq-domain-cells = <1>;
+                       #clock-cells = <1>;
                };
 
                cdsp: remoteproc@98900000 {