drm/amd/display: Fix surface optimization regression on Carrizo
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tue, 12 Oct 2021 14:04:03 +0000 (10:04 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 29 Jul 2022 15:25:31 +0000 (17:25 +0200)
commit 62e5a7e2333a9f5395f6a9db766b7b06c949fe7a upstream.

[Why]
DCE legacy optimization path isn't well tested under new DC optimization
flow which can result in underflow occuring when initializing X11 on
Carrizo.

[How]
Retain the legacy optimization flow for DCE and keep the new one for DCN
to satisfy optimizations being correctly applied for ASIC that can
support it.

Fixes: 34316c1e561db0 ("drm/amd/display: Optimize bandwidth on following fast update")
Reported-by: Tom St Denis <tom.stdenis@amd.com>
Tested-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Mario Limonciello <Mario.Limonciello@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/display/dc/core/dc.c

index 46bef17399206e49eeacebf98445efb413c9609a..1bde9d4e82d4bbdffffeabcce315df18938acfcd 100644 (file)
@@ -2979,8 +2979,13 @@ void dc_commit_updates_for_stream(struct dc *dc,
                        if (new_pipe->plane_state && new_pipe->plane_state != old_pipe->plane_state)
                                new_pipe->plane_state->force_full_update = true;
                }
-       } else if (update_type == UPDATE_TYPE_FAST) {
-               /* Previous frame finished and HW is ready for optimization. */
+       } else if (update_type == UPDATE_TYPE_FAST && dc_ctx->dce_version >= DCE_VERSION_MAX) {
+               /*
+                * Previous frame finished and HW is ready for optimization.
+                *
+                * Only relevant for DCN behavior where we can guarantee the optimization
+                * is safe to apply - retain the legacy behavior for DCE.
+                */
                dc_post_update_surfaces_to_stream(dc);
        }
 
@@ -3039,6 +3044,12 @@ void dc_commit_updates_for_stream(struct dc *dc,
                }
        }
 
+       /* Legacy optimization path for DCE. */
+       if (update_type >= UPDATE_TYPE_FULL && dc_ctx->dce_version < DCE_VERSION_MAX) {
+               dc_post_update_surfaces_to_stream(dc);
+               TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce);
+       }
+
        return;
 
 }