powerpc: Add Power11 architected and raw mode
authorMadhavan Srinivasan <maddy@linux.ibm.com>
Wed, 21 Feb 2024 04:46:22 +0000 (15:46 +1100)
committerMichael Ellerman <mpe@ellerman.id.au>
Wed, 21 Feb 2024 12:11:00 +0000 (23:11 +1100)
Add CPU table entries for raw and architected mode. Most fields are
copied from the Power10 table entries.

CPU, MMU and user (ELF_HWCAP) features are unchanged vs P10. However
userspace can detect P11 because the AT_PLATFORM value changes to
"power11".

The logical PVR value of 0x0F000007, passed to firmware via the
ibm_arch_vec, indicates the kernel can support a P11 compatible CPU,
which means at least ISA v3.1 compliant.

Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20240221044623.1598642-1-mpe@ellerman.id.au
arch/powerpc/include/asm/cputable.h
arch/powerpc/include/asm/mmu.h
arch/powerpc/include/asm/reg.h
arch/powerpc/kernel/cpu_specs_book3s_64.h
arch/powerpc/kernel/dt_cpu_ftrs.c
arch/powerpc/kernel/prom_init.c
arch/powerpc/kvm/book3s_hv.c

index 8765d5158324e510c253505a1fd9aa9fe392199b..3bd6e6e0224c8ad3f10aee141110017f03a232ee 100644 (file)
@@ -454,6 +454,9 @@ static inline void cpu_feature_keys_init(void) { }
            CPU_FTR_ARCH_300 | CPU_FTR_ARCH_31 | \
            CPU_FTR_DAWR | CPU_FTR_DAWR1 | \
            CPU_FTR_DEXCR_NPHIE)
+
+#define CPU_FTRS_POWER11       CPU_FTRS_POWER10
+
 #define CPU_FTRS_CELL  (CPU_FTR_LWSYNC | \
            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
            CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
index d8b7e246a32f5925bc09132bc56db598920fffb5..61ebe5eff2c950e03e8713f8883aad85f6b9877b 100644 (file)
 #define MMU_FTRS_POWER8                MMU_FTRS_POWER6
 #define MMU_FTRS_POWER9                MMU_FTRS_POWER6
 #define MMU_FTRS_POWER10       MMU_FTRS_POWER6
+#define MMU_FTRS_POWER11       MMU_FTRS_POWER6
 #define MMU_FTRS_CELL          MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
                                MMU_FTR_CI_LARGE_PAGE
 #define MMU_FTRS_PA6T          MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
index 7fd09f25452d4f697728f7958a9ad5b277f73a50..58d6348e4ea0fef48d380b25a655a5e13971fd82 100644 (file)
 #define PVR_HX_C2000   0x0066
 #define PVR_POWER9     0x004E
 #define PVR_POWER10    0x0080
+#define PVR_POWER11    0x0082
 #define PVR_BE         0x0070
 #define PVR_PA6T       0x0090
 
 #define PVR_ARCH_207   0x0f000004
 #define PVR_ARCH_300   0x0f000005
 #define PVR_ARCH_31    0x0f000006
+#define PVR_ARCH_31_P11        0x0f000007
 
 /* Macros for setting and retrieving special purpose registers */
 #ifndef __ASSEMBLY__
index 3ff9757df4c0723008b655830fbed89b4e078e57..98d4274a1b6bf935239c50e6e12c63b2ba03cac3 100644 (file)
@@ -60,6 +60,9 @@
                                 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
                                 PPC_FEATURE2_VEC_CRYPTO)
 
+#define COMMON_USER_POWER11    COMMON_USER_POWER10
+#define COMMON_USER2_POWER11   COMMON_USER2_POWER10
+
 static struct cpu_spec cpu_specs[] __initdata = {
        {       /* PPC970 */
                .pvr_mask               = 0xffff0000,
@@ -281,6 +284,20 @@ static struct cpu_spec cpu_specs[] __initdata = {
                .cpu_restore            = __restore_cpu_power10,
                .platform               = "power10",
        },
+       {       /* 3.1-compliant processor, i.e. Power11 "architected" mode */
+               .pvr_mask               = 0xffffffff,
+               .pvr_value              = 0x0f000007,
+               .cpu_name               = "Power11 (architected)",
+               .cpu_features           = CPU_FTRS_POWER11,
+               .cpu_user_features      = COMMON_USER_POWER11,
+               .cpu_user_features2     = COMMON_USER2_POWER11,
+               .mmu_features           = MMU_FTRS_POWER11,
+               .icache_bsize           = 128,
+               .dcache_bsize           = 128,
+               .cpu_setup              = __setup_cpu_power10,
+               .cpu_restore            = __restore_cpu_power10,
+               .platform               = "power11",
+       },
        {       /* Power7 */
                .pvr_mask               = 0xffff0000,
                .pvr_value              = 0x003f0000,
@@ -451,6 +468,23 @@ static struct cpu_spec cpu_specs[] __initdata = {
                .machine_check_early    = __machine_check_early_realmode_p10,
                .platform               = "power10",
        },
+       {       /* Power11 */
+               .pvr_mask               = 0xffff0000,
+               .pvr_value              = 0x00820000,
+               .cpu_name               = "Power11 (raw)",
+               .cpu_features           = CPU_FTRS_POWER11,
+               .cpu_user_features      = COMMON_USER_POWER11,
+               .cpu_user_features2     = COMMON_USER2_POWER11,
+               .mmu_features           = MMU_FTRS_POWER11,
+               .icache_bsize           = 128,
+               .dcache_bsize           = 128,
+               .num_pmcs               = 6,
+               .pmc_type               = PPC_PMC_IBM,
+               .cpu_setup              = __setup_cpu_power10,
+               .cpu_restore            = __restore_cpu_power10,
+               .machine_check_early    = __machine_check_early_realmode_p10,
+               .platform               = "power11",
+       },
        {       /* Cell Broadband Engine */
                .pvr_mask               = 0xffff0000,
                .pvr_value              = 0x00700000,
index c3fb9fdf5bd782e121571efd679e812a4540b2a5..af4263594eb2c93c5b1d1240acf4aae161c24edd 100644 (file)
@@ -458,6 +458,14 @@ static int __init feat_enable_mce_power10(struct dt_cpu_feature *f)
        return 1;
 }
 
+static int __init feat_enable_mce_power11(struct dt_cpu_feature *f)
+{
+       cur_cpu_spec->platform = "power11";
+       cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p10;
+
+       return 1;
+}
+
 static int __init feat_enable_tm(struct dt_cpu_feature *f)
 {
 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
@@ -648,8 +656,10 @@ static struct dt_cpu_feature_match __initdata
        {"pc-relative-addressing", feat_enable, 0},
        {"machine-check-power9", feat_enable_mce_power9, 0},
        {"machine-check-power10", feat_enable_mce_power10, 0},
+       {"machine-check-power11", feat_enable_mce_power11, 0},
        {"performance-monitor-power9", feat_enable_pmu_power9, 0},
        {"performance-monitor-power10", feat_enable_pmu_power10, 0},
+       {"performance-monitor-power11", feat_enable_pmu_power10, 0},
        {"event-based-branch-v3", feat_enable, 0},
        {"random-number-generator", feat_enable, 0},
        {"system-call-vectored", feat_disable, 0},
index e67effdba85cc03096132223ad9c4d7dbc698f58..0ef358285337412f14dcf073282bca863dc88949 100644 (file)
@@ -947,7 +947,7 @@ struct option_vector7 {
 } __packed;
 
 struct ibm_arch_vec {
-       struct { __be32 mask, val; } pvrs[14];
+       struct { __be32 mask, val; } pvrs[16];
 
        u8 num_vectors;
 
@@ -1007,6 +1007,14 @@ static const struct ibm_arch_vec ibm_architecture_vec_template __initconst = {
                        .mask = cpu_to_be32(0xffff0000), /* POWER10 */
                        .val  = cpu_to_be32(0x00800000),
                },
+               {
+                       .mask = cpu_to_be32(0xffff0000), /* POWER11 */
+                       .val  = cpu_to_be32(0x00820000),
+               },
+               {
+                       .mask = cpu_to_be32(0xffffffff), /* P11 compliant */
+                       .val  = cpu_to_be32(0x0f000007),
+               },
                {
                        .mask = cpu_to_be32(0xffffffff), /* all 3.1-compliant */
                        .val  = cpu_to_be32(0x0f000006),
index 52427fc2a33fa4ad7032bcc6323bc6364918d98f..0ee7395caa21960d8f875bd9d0891dfc57d26673 100644 (file)
@@ -427,6 +427,7 @@ static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
                        cap = H_GUEST_CAP_POWER9;
                        break;
                case PVR_ARCH_31:
+               case PVR_ARCH_31_P11:
                        guest_pcr_bit = PCR_ARCH_31;
                        cap = H_GUEST_CAP_POWER10;
                        break;