MIPS: traps: Use GPR number macros

Use GPR number macros in uasm code generation parts to
reduce code duplication.

No functional change.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index a1c1cb5de91321468f338d41a01df2f40efaf293..2d95e9971a2df4ded65fe7b548b964fcb30927f9 100644 (file)
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -58,6 +58,7 @@
 #include <asm/module.h>
 #include <asm/msa.h>
 #include <asm/ptrace.h>
+#include <asm/regdef.h>
 #include <asm/sections.h>
 #include <asm/siginfo.h>
 #include <asm/tlbdebug.h>
@@ -2041,13 +2042,12 @@ void __init *set_except_vector(int n, void *addr)
                unsigned long jump_mask = ~((1 << 28) - 1);
 #endif
                u32 *buf = (u32 *)(ebase + 0x200);
-               unsigned int k0 = 26;
                if ((handler & jump_mask) == ((ebase + 0x200) & jump_mask)) {
                        uasm_i_j(&buf, handler & ~jump_mask);
                        uasm_i_nop(&buf);
                } else {
-                       UASM_i_LA(&buf, k0, handler);
-                       uasm_i_jr(&buf, k0);
+                       UASM_i_LA(&buf, GPR_K0, handler);
+                       uasm_i_jr(&buf, GPR_K0);
                        uasm_i_nop(&buf);
                }
                local_flush_icache_range(ebase + 0x200, (unsigned long)buf);