{
if (ctx->sink) {
tcg_gen_discard_i64(ctx->sink);
- tcg_temp_free(ctx->sink);
ctx->sink = NULL;
}
}
TCGv_i32 tmp32 = tcg_temp_new_i32();
tcg_gen_qemu_ld_i32(tmp32, addr, ctx->mem_idx, MO_LEUL | UNALIGN(ctx));
gen_helper_memory_to_f(dest, tmp32);
- tcg_temp_free_i32(tmp32);
}
static void gen_ldg(DisasContext *ctx, TCGv dest, TCGv addr)
TCGv tmp = tcg_temp_new();
tcg_gen_qemu_ld_i64(tmp, addr, ctx->mem_idx, MO_LEUQ | UNALIGN(ctx));
gen_helper_memory_to_g(dest, tmp);
- tcg_temp_free(tmp);
}
static void gen_lds(DisasContext *ctx, TCGv dest, TCGv addr)
TCGv_i32 tmp32 = tcg_temp_new_i32();
tcg_gen_qemu_ld_i32(tmp32, addr, ctx->mem_idx, MO_LEUL | UNALIGN(ctx));
gen_helper_memory_to_s(dest, tmp32);
- tcg_temp_free_i32(tmp32);
}
static void gen_ldt(DisasContext *ctx, TCGv dest, TCGv addr)
TCGv addr = tcg_temp_new();
tcg_gen_addi_i64(addr, load_gpr(ctx, rb), disp16);
func(ctx, cpu_fir[ra], addr);
- tcg_temp_free(addr);
}
}
tcg_gen_mov_i64(cpu_lock_addr, addr);
tcg_gen_mov_i64(cpu_lock_value, dest);
}
- tcg_temp_free(addr);
}
static void gen_stf(DisasContext *ctx, TCGv src, TCGv addr)
TCGv_i32 tmp32 = tcg_temp_new_i32();
gen_helper_f_to_memory(tmp32, addr);
tcg_gen_qemu_st_i32(tmp32, addr, ctx->mem_idx, MO_LEUL | UNALIGN(ctx));
- tcg_temp_free_i32(tmp32);
}
static void gen_stg(DisasContext *ctx, TCGv src, TCGv addr)
TCGv tmp = tcg_temp_new();
gen_helper_g_to_memory(tmp, src);
tcg_gen_qemu_st_i64(tmp, addr, ctx->mem_idx, MO_LEUQ | UNALIGN(ctx));
- tcg_temp_free(tmp);
}
static void gen_sts(DisasContext *ctx, TCGv src, TCGv addr)
TCGv_i32 tmp32 = tcg_temp_new_i32();
gen_helper_s_to_memory(tmp32, src);
tcg_gen_qemu_st_i32(tmp32, addr, ctx->mem_idx, MO_LEUL | UNALIGN(ctx));
- tcg_temp_free_i32(tmp32);
}
static void gen_stt(DisasContext *ctx, TCGv src, TCGv addr)
TCGv addr = tcg_temp_new();
tcg_gen_addi_i64(addr, load_gpr(ctx, rb), disp16);
func(ctx, load_fpr(ctx, ra), addr);
- tcg_temp_free(addr);
}
static void gen_store_int(DisasContext *ctx, int ra, int rb, int32_t disp16,
src = load_gpr(ctx, ra);
tcg_gen_qemu_st_i64(src, addr, ctx->mem_idx, op);
-
- tcg_temp_free(addr);
}
static DisasJumpType gen_store_conditional(DisasContext *ctx, int ra, int rb,
lab_fail = gen_new_label();
lab_done = gen_new_label();
tcg_gen_brcond_i64(TCG_COND_NE, addr, cpu_lock_addr, lab_fail);
- tcg_temp_free_i64(addr);
val = tcg_temp_new_i64();
tcg_gen_atomic_cmpxchg_i64(val, cpu_lock_addr, cpu_lock_value,
if (ra != 31) {
tcg_gen_setcond_i64(TCG_COND_EQ, ctx->ir[ra], val, cpu_lock_value);
}
- tcg_temp_free_i64(val);
tcg_gen_br(lab_done);
gen_set_label(lab_fail);
tcg_gen_andi_i64(tmp, load_gpr(ctx, ra), 1);
ret = gen_bcond_internal(ctx, cond, tmp, disp);
- tcg_temp_free(tmp);
return ret;
}
return gen_bcond_internal(ctx, cond, load_gpr(ctx, ra), disp);
gen_fold_mzero(cond, cmp_tmp, load_fpr(ctx, ra));
ret = gen_bcond_internal(ctx, cond, cmp_tmp, disp);
- tcg_temp_free(cmp_tmp);
return ret;
}
gen_fold_mzero(cond, va, load_fpr(ctx, ra));
tcg_gen_movcond_i64(cond, dest_fpr(ctx, rc), va, z, vb, load_fpr(ctx, rc));
-
- tcg_temp_free(va);
}
#define QUAL_RM_N 0x080 /* Round mode nearest even */
#else
gen_helper_setroundmode(tmp);
#endif
-
- tcg_temp_free_i32(tmp);
}
static void gen_qual_flushzero(DisasContext *ctx, int fn11)
#else
gen_helper_setflushzero(tmp);
#endif
-
- tcg_temp_free_i32(tmp);
}
static TCGv gen_ieee_input(DisasContext *ctx, int reg, int fn11, int is_cmp)
tcg_gen_shri_i64(tmp, vb, 29);
tcg_gen_sari_i64(vc, vb, 32);
tcg_gen_deposit_i64(vc, vc, tmp, 0, 30);
-
- tcg_temp_free(tmp);
}
static void gen_ieee_arith2(DisasContext *ctx,
tcg_gen_andc_i64(vc, vb, vmask);
tcg_gen_or_i64(vc, vc, tmp);
-
- tcg_temp_free(tmp);
}
static void gen_ieee_arith3(DisasContext *ctx,
tcg_gen_neg_i64(tmp, tmp);
tcg_gen_andi_i64(tmp, tmp, 0x3f);
tcg_gen_shl_i64(vc, va, tmp);
- tcg_temp_free(tmp);
}
gen_zapnoti(vc, vc, byte_mask);
}
tcg_gen_andi_i64(tmp, load_gpr(ctx, rb), 7);
tcg_gen_shli_i64(tmp, tmp, 3);
tcg_gen_shr_i64(vc, va, tmp);
- tcg_temp_free(tmp);
gen_zapnoti(vc, vc, byte_mask);
}
}
tcg_gen_shr_i64(vc, tmp, shift);
tcg_gen_shri_i64(vc, vc, 1);
- tcg_temp_free(shift);
- tcg_temp_free(tmp);
}
}
tcg_gen_andi_i64(shift, load_gpr(ctx, rb), 7);
tcg_gen_shli_i64(shift, shift, 3);
tcg_gen_shl_i64(vc, tmp, shift);
- tcg_temp_free(shift);
- tcg_temp_free(tmp);
}
}
tcg_gen_shri_i64(mask, mask, 1);
tcg_gen_andc_i64(vc, va, mask);
-
- tcg_temp_free(mask);
- tcg_temp_free(shift);
}
}
tcg_gen_shl_i64(mask, mask, shift);
tcg_gen_andc_i64(vc, va, mask);
-
- tcg_temp_free(mask);
- tcg_temp_free(shift);
}
}
TCGv tmp = tcg_temp_new();
tcg_gen_andi_i64(tmp, ctx->ir[IR_A0], PS_INT_MASK);
st_flag_byte(tmp, ENV_FLAG_PS_SHIFT);
- tcg_temp_free(tmp);
}
/* Allow interrupts to be recognized right away. */
tcg_gen_movi_i64(tmp, exc_addr);
tcg_gen_st_i64(tmp, cpu_env, offsetof(CPUAlphaState, exc_addr));
- tcg_temp_free(tmp);
entry += (palcode & 0x80
? 0x2000 + (palcode - 0x80) * 64
tcg_gen_shli_i64(tmp, va, 2);
tcg_gen_add_i64(tmp, tmp, vb);
tcg_gen_ext32s_i64(vc, tmp);
- tcg_temp_free(tmp);
break;
case 0x09:
/* SUBL */
tcg_gen_shli_i64(tmp, va, 2);
tcg_gen_sub_i64(tmp, tmp, vb);
tcg_gen_ext32s_i64(vc, tmp);
- tcg_temp_free(tmp);
break;
case 0x0F:
/* CMPBGE */
tcg_gen_shli_i64(tmp, va, 3);
tcg_gen_add_i64(tmp, tmp, vb);
tcg_gen_ext32s_i64(vc, tmp);
- tcg_temp_free(tmp);
break;
case 0x1B:
/* S8SUBL */
tcg_gen_shli_i64(tmp, va, 3);
tcg_gen_sub_i64(tmp, tmp, vb);
tcg_gen_ext32s_i64(vc, tmp);
- tcg_temp_free(tmp);
break;
case 0x1D:
/* CMPULT */
tmp = tcg_temp_new();
tcg_gen_shli_i64(tmp, va, 2);
tcg_gen_add_i64(vc, tmp, vb);
- tcg_temp_free(tmp);
break;
case 0x29:
/* SUBQ */
tmp = tcg_temp_new();
tcg_gen_shli_i64(tmp, va, 2);
tcg_gen_sub_i64(vc, tmp, vb);
- tcg_temp_free(tmp);
break;
case 0x2D:
/* CMPEQ */
tmp = tcg_temp_new();
tcg_gen_shli_i64(tmp, va, 3);
tcg_gen_add_i64(vc, tmp, vb);
- tcg_temp_free(tmp);
break;
case 0x3B:
/* S8SUBQ */
tmp = tcg_temp_new();
tcg_gen_shli_i64(tmp, va, 3);
tcg_gen_sub_i64(vc, tmp, vb);
- tcg_temp_free(tmp);
break;
case 0x3D:
/* CMPULE */
tcg_gen_add_i64(tmp, tmp, vc);
tcg_gen_ext32s_i64(vc, tmp);
gen_helper_check_overflow(cpu_env, vc, tmp);
- tcg_temp_free(tmp);
break;
case 0x49:
/* SUBL/V */
tcg_gen_sub_i64(tmp, tmp, vc);
tcg_gen_ext32s_i64(vc, tmp);
gen_helper_check_overflow(cpu_env, vc, tmp);
- tcg_temp_free(tmp);
break;
case 0x4D:
/* CMPLT */
tcg_gen_shri_i64(tmp, tmp, 63);
tcg_gen_movi_i64(tmp2, 0);
gen_helper_check_overflow(cpu_env, tmp, tmp2);
- tcg_temp_free(tmp);
- tcg_temp_free(tmp2);
break;
case 0x69:
/* SUBQ/V */
tcg_gen_shri_i64(tmp, tmp, 63);
tcg_gen_movi_i64(tmp2, 0);
gen_helper_check_overflow(cpu_env, tmp, tmp2);
- tcg_temp_free(tmp);
- tcg_temp_free(tmp2);
break;
case 0x6D:
/* CMPLE */
tcg_gen_andi_i64(tmp, va, 1);
tcg_gen_movcond_i64(TCG_COND_NE, vc, tmp, load_zero(ctx),
vb, load_gpr(ctx, rc));
- tcg_temp_free(tmp);
break;
case 0x16:
/* CMOVLBC */
tcg_gen_andi_i64(tmp, va, 1);
tcg_gen_movcond_i64(TCG_COND_EQ, vc, tmp, load_zero(ctx),
vb, load_gpr(ctx, rc));
- tcg_temp_free(tmp);
break;
case 0x20:
/* BIS */
vb = load_gpr(ctx, rb);
tcg_gen_andi_i64(tmp, vb, 0x3f);
tcg_gen_shr_i64(vc, va, tmp);
- tcg_temp_free(tmp);
}
break;
case 0x36:
vb = load_gpr(ctx, rb);
tcg_gen_andi_i64(tmp, vb, 0x3f);
tcg_gen_shl_i64(vc, va, tmp);
- tcg_temp_free(tmp);
}
break;
case 0x3B:
vb = load_gpr(ctx, rb);
tcg_gen_andi_i64(tmp, vb, 0x3f);
tcg_gen_sar_i64(vc, va, tmp);
- tcg_temp_free(tmp);
}
break;
case 0x52:
/* UMULH */
tmp = tcg_temp_new();
tcg_gen_mulu2_i64(tmp, vc, va, vb);
- tcg_temp_free(tmp);
break;
case 0x40:
/* MULL/V */
tcg_gen_mul_i64(tmp, tmp, vc);
tcg_gen_ext32s_i64(vc, tmp);
gen_helper_check_overflow(cpu_env, vc, tmp);
- tcg_temp_free(tmp);
break;
case 0x60:
/* MULQ/V */
tcg_gen_muls2_i64(vc, tmp, va, vb);
tcg_gen_sari_i64(tmp2, vc, 63);
gen_helper_check_overflow(cpu_env, tmp, tmp2);
- tcg_temp_free(tmp);
- tcg_temp_free(tmp2);
break;
default:
goto invalid_opc;
va = load_gpr(ctx, ra);
tcg_gen_extrl_i64_i32(t32, va);
gen_helper_memory_to_s(vc, t32);
- tcg_temp_free_i32(t32);
break;
case 0x0A:
/* SQRTF */
va = load_gpr(ctx, ra);
tcg_gen_extrl_i64_i32(t32, va);
gen_helper_memory_to_f(vc, t32);
- tcg_temp_free_i32(t32);
break;
case 0x24:
/* ITOFT */
tcg_gen_qemu_ld_i64(va, addr, MMU_USER_IDX, MO_LEUQ);
break;
}
- tcg_temp_free(addr);
break;
}
#else
va = load_fpr(ctx, ra);
gen_helper_s_to_memory(t32, va);
tcg_gen_ext_i32_i64(vc, t32);
- tcg_temp_free_i32(t32);
break;
}
tmp = tcg_temp_new();
tcg_gen_andi_i64(tmp, vb, 1);
st_flag_byte(tmp, ENV_FLAG_PAL_SHIFT);
- tcg_temp_free(tmp);
tcg_gen_andi_i64(cpu_pc, vb, ~3);
/* Allow interrupts to be recognized right away. */
ret = DISAS_PC_UPDATED_NOCHAIN;
tmp = tcg_temp_new();
tcg_gen_addi_i64(tmp, vb, disp12);
tcg_gen_qemu_st_i64(va, tmp, MMU_PHYS_IDX, MO_LESL);
- tcg_temp_free(tmp);
break;
case 0x1:
/* Quadword physical access */
tmp = tcg_temp_new();
tcg_gen_addi_i64(tmp, vb, disp12);
tcg_gen_qemu_st_i64(va, tmp, MMU_PHYS_IDX, MO_LEUQ);
- tcg_temp_free(tmp);
break;
case 0x2:
/* Longword physical access with lock */