arm64: dts: mediatek: add pinctrl support for mt7986a
authorSam Shih <sam.shih@mediatek.com>
Mon, 22 Nov 2021 12:35:51 +0000 (20:35 +0800)
committerMatthias Brugger <matthias.bgg@gmail.com>
Wed, 15 Dec 2021 20:06:35 +0000 (21:06 +0100)
Add mt7986a pinctrl node, and update pinmux setting for mt7986a

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Link: https://lore.kernel.org/r/20211122123552.8218-2-sam.shih@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
arch/arm64/boot/dts/mediatek/mt7986a.dtsi

index 6911862390d72c59e0022b4190cbf9ec5618a876..5cd760abff51bf858a0351bb0752d198055776f5 100644 (file)
 };
 
 &uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins>;
        status = "okay";
 };
 
 &uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
        status = "okay";
 };
+
+&pio {
+       uart1_pins: uart1-pins {
+               mux {
+                       function = "uart";
+                       groups = "uart1";
+               };
+       };
+
+       uart2_pins: uart2-pins {
+               mux {
+                       function = "uart";
+                       groups = "uart2";
+               };
+       };
+};
index 77906839cc8531a19bd1bdf03df6cad3f872d89c..b8da76b6ba471939fc0cebe2ba8a8bf8a2ff14a6 100644 (file)
                        status = "disabled";
                };
 
+               pio: pinctrl@1001f000 {
+                       compatible = "mediatek,mt7986a-pinctrl";
+                       reg = <0 0x1001f000 0 0x1000>,
+                             <0 0x11c30000 0 0x1000>,
+                             <0 0x11c40000 0 0x1000>,
+                             <0 0x11e20000 0 0x1000>,
+                             <0 0x11e30000 0 0x1000>,
+                             <0 0x11f00000 0 0x1000>,
+                             <0 0x11f10000 0 0x1000>,
+                             <0 0x1000b000 0 0x1000>;
+                       reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt",
+                                   "iocfg_lb", "iocfg_tr", "iocfg_tl", "eint";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       gpio-ranges = <&pio 0 0 100>;
+                       interrupt-controller;
+                       interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-parent = <&gic>;
+                       #interrupt-cells = <2>;
+               };
+
                trng: trng@1020f000 {
                        compatible = "mediatek,mt7986-rng",
                                     "mediatek,mt7623-rng";