p->gc->reg_base = p->cpu_int_base;
        p->gc->chip_types[0].regs.enable = IRQC_EN_SET;
        p->gc->chip_types[0].regs.disable = IRQC_EN_STS;
-       p->gc->chip_types[0].chip.parent_device = dev;
        p->gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;
        p->gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;
        p->gc->chip_types[0].chip.irq_set_type  = irqc_irq_set_type;
        p->gc->chip_types[0].chip.irq_set_wake  = irqc_irq_set_wake;
        p->gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND;
 
+       irq_domain_set_pm_device(p->irq_domain, dev);
+
        /* request interrupts one by one */
        for (k = 0; k < p->number_of_irqs; k++) {
                if (devm_request_irq(dev, p->irq[k].requested_irq,