drm/amdgpu/vi: move sdma tiling config setup into sdma code

Split sdma and gfx programming.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index ea137bfe4b72815b2ae7b5ba5bea3fec0d1c990d..8dfc0ac7ff9041c12b2b2c063d19651c1b5c1d8c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -2695,10 +2695,6 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev)
        WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
        WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
        WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config);
-       WREG32(mmSDMA0_TILING_CONFIG + SDMA0_REGISTER_OFFSET,
-              adev->gfx.config.gb_addr_config & 0x70);
-       WREG32(mmSDMA0_TILING_CONFIG + SDMA1_REGISTER_OFFSET,
-              adev->gfx.config.gb_addr_config & 0x70);
        WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
        WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
        WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
@@ -3959,10 +3955,6 @@ static void gfx_v8_0_print_status(void *handle)
                 RREG32(mmHDP_ADDR_CONFIG));
        dev_info(adev->dev, "  DMIF_ADDR_CALC=0x%08X\n",
                 RREG32(mmDMIF_ADDR_CALC));
-       dev_info(adev->dev, "  SDMA0_TILING_CONFIG=0x%08X\n",
-                RREG32(mmSDMA0_TILING_CONFIG + SDMA0_REGISTER_OFFSET));
-       dev_info(adev->dev, "  SDMA1_TILING_CONFIG=0x%08X\n",
-                RREG32(mmSDMA0_TILING_CONFIG + SDMA1_REGISTER_OFFSET));
        dev_info(adev->dev, "  UVD_UDEC_ADDR_CONFIG=0x%08X\n",
                 RREG32(mmUVD_UDEC_ADDR_CONFIG));
        dev_info(adev->dev, "  UVD_UDEC_DB_ADDR_CONFIG=0x%08X\n",

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
index c895af79d4bbec44d763916e9912a0a867028262..29ec986dd6fce61cd4b821d48ce6bbe3cc771762 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
@@ -434,6 +434,9 @@ static int sdma_v2_4_gfx_resume(struct amdgpu_device *adev)
                vi_srbm_select(adev, 0, 0, 0, 0);
                mutex_unlock(&adev->srbm_mutex);
 
+               WREG32(mmSDMA0_TILING_CONFIG + sdma_offsets[i],
+                      adev->gfx.config.gb_addr_config & 0x70);
+
                WREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);
 
                /* Set ring buffer size in dwords */
@@ -1078,6 +1081,8 @@ static void sdma_v2_4_print_status(void *handle)
                         i, RREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i]));
                dev_info(adev->dev, "  SDMA%d_GFX_RB_BASE_HI=0x%08X\n",
                         i, RREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i]));
+               dev_info(adev->dev, "  SDMA%d_TILING_CONFIG=0x%08X\n",
+                        i, RREG32(mmSDMA0_TILING_CONFIG + sdma_offsets[i]));
                mutex_lock(&adev->srbm_mutex);
                for (j = 0; j < 16; j++) {
                        vi_srbm_select(adev, 0, 0, 0, j);

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index dcb3efdd1bd9047a1ba78d0844f0052b725902f4..6f064d7076e68c98b8cefdb508bb0968d76b1866 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -570,6 +570,9 @@ static int sdma_v3_0_gfx_resume(struct amdgpu_device *adev)
                vi_srbm_select(adev, 0, 0, 0, 0);
                mutex_unlock(&adev->srbm_mutex);
 
+               WREG32(mmSDMA0_TILING_CONFIG + sdma_offsets[i],
+                      adev->gfx.config.gb_addr_config & 0x70);
+
                WREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);
 
                /* Set ring buffer size in dwords */
@@ -1241,6 +1244,8 @@ static void sdma_v3_0_print_status(void *handle)
                         i, RREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i]));
                dev_info(adev->dev, "  SDMA%d_GFX_DOORBELL=0x%08X\n",
                         i, RREG32(mmSDMA0_GFX_DOORBELL + sdma_offsets[i]));
+               dev_info(adev->dev, "  SDMA%d_TILING_CONFIG=0x%08X\n",
+                        i, RREG32(mmSDMA0_TILING_CONFIG + sdma_offsets[i]));
                mutex_lock(&adev->srbm_mutex);
                for (j = 0; j < 16; j++) {
                        vi_srbm_select(adev, 0, 0, 0, j);