drm/amdgpu: Restore partition mode after reset
authorLijo Lazar <lijo.lazar@amd.com>
Fri, 8 Sep 2023 08:11:24 +0000 (13:41 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2023 20:54:51 +0000 (16:54 -0400)
On a full device reset, PSP FW gets unloaded. Hence restore the
partition mode by placing a new request.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.h
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

index 8723377a3bb577fbb384fd8c2fe788fffce9b9dd..22c0e035de81b1847e3d693c36805e3ab0ab8138 100644 (file)
@@ -5137,6 +5137,11 @@ int amdgpu_do_asic_reset(struct list_head *device_list_handle,
                                if (r)
                                        return r;
 
+                               r = amdgpu_xcp_restore_partition_mode(
+                                       tmp_adev->xcp_mgr);
+                               if (r)
+                                       goto out;
+
                                r = amdgpu_device_ip_resume_phase2(tmp_adev);
                                if (r)
                                        goto out;
index 565a1fa436d4b8032e83cf6d7dc3863480a1d56d..2b99eed5ba19201fb174064cdd45c2a892e568fa 100644 (file)
@@ -163,16 +163,11 @@ int amdgpu_xcp_init(struct amdgpu_xcp_mgr *xcp_mgr, int num_xcps, int mode)
        return 0;
 }
 
-int amdgpu_xcp_switch_partition_mode(struct amdgpu_xcp_mgr *xcp_mgr, int mode)
+static int __amdgpu_xcp_switch_partition_mode(struct amdgpu_xcp_mgr *xcp_mgr,
+                                             int mode)
 {
        int ret, curr_mode, num_xcps = 0;
 
-       if (!xcp_mgr || mode == AMDGPU_XCP_MODE_NONE)
-               return -EINVAL;
-
-       if (xcp_mgr->mode == mode)
-               return 0;
-
        if (!xcp_mgr->funcs || !xcp_mgr->funcs->switch_partition_mode)
                return 0;
 
@@ -201,6 +196,25 @@ out:
        return ret;
 }
 
+int amdgpu_xcp_switch_partition_mode(struct amdgpu_xcp_mgr *xcp_mgr, int mode)
+{
+       if (!xcp_mgr || mode == AMDGPU_XCP_MODE_NONE)
+               return -EINVAL;
+
+       if (xcp_mgr->mode == mode)
+               return 0;
+
+       return __amdgpu_xcp_switch_partition_mode(xcp_mgr, mode);
+}
+
+int amdgpu_xcp_restore_partition_mode(struct amdgpu_xcp_mgr *xcp_mgr)
+{
+       if (!xcp_mgr || xcp_mgr->mode == AMDGPU_XCP_MODE_NONE)
+               return 0;
+
+       return __amdgpu_xcp_switch_partition_mode(xcp_mgr, xcp_mgr->mode);
+}
+
 int amdgpu_xcp_query_partition_mode(struct amdgpu_xcp_mgr *xcp_mgr, u32 flags)
 {
        int mode;
index 9a1036aeec2a0bcd289a778abcb12b8beb74599f..90138bc5f03d1c926a1d3bb6b16227510356aee2 100644 (file)
@@ -129,6 +129,7 @@ int amdgpu_xcp_mgr_init(struct amdgpu_device *adev, int init_mode,
 int amdgpu_xcp_init(struct amdgpu_xcp_mgr *xcp_mgr, int num_xcps, int mode);
 int amdgpu_xcp_query_partition_mode(struct amdgpu_xcp_mgr *xcp_mgr, u32 flags);
 int amdgpu_xcp_switch_partition_mode(struct amdgpu_xcp_mgr *xcp_mgr, int mode);
+int amdgpu_xcp_restore_partition_mode(struct amdgpu_xcp_mgr *xcp_mgr);
 int amdgpu_xcp_get_partition(struct amdgpu_xcp_mgr *xcp_mgr,
                             enum AMDGPU_XCP_IP_BLOCK ip, int instance);
 
index d0fc62784e82171246d520606d56f7917df21cf8..3f715e7fe1a959ccabcc9da0c35633efa387eb06 100644 (file)
@@ -500,7 +500,7 @@ static int aqua_vanjaram_switch_partition_mode(struct amdgpu_xcp_mgr *xcp_mgr,
                return -EINVAL;
        }
 
-       if (adev->kfd.init_complete)
+       if (adev->kfd.init_complete && !amdgpu_in_reset(adev))
                flags |= AMDGPU_XCP_OPS_KFD;
 
        if (flags & AMDGPU_XCP_OPS_KFD) {