mfd: Add support for the MediaTek MT6366 PMIC
authorJohnson Wang <johnson.wang@mediatek.com>
Thu, 6 Jan 2022 06:54:04 +0000 (14:54 +0800)
committerLee Jones <lee.jones@linaro.org>
Mon, 7 Mar 2022 14:59:44 +0000 (14:59 +0000)
This adds support for the MediaTek MT6366 PMIC. This is a
multifunction device with the following sub modules:

- Regulator
- RTC
- Codec
- Interrupt

It is interfaced to the host controller using SPI interface
by a proprietary hardware called PMIC wrapper or pwrap.
MT6366 MFD is a child device of the pwrap.

Signed-off-by: Johnson Wang <johnson.wang@mediatek.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220106065407.16036-2-johnson.wang@mediatek.com
drivers/mfd/mt6358-irq.c
include/linux/mfd/mt6358/registers.h
include/linux/mfd/mt6397/core.h

index 83f3ffbdbb4ca59158fd33c71287242df4b9964c..ea5e452510eb1366bea2efd44e63558afae67d95 100644 (file)
@@ -212,6 +212,7 @@ int mt6358_irq_init(struct mt6397_chip *chip)
 
        switch (chip->chip_id) {
        case MT6358_CHIP_ID:
+       case MT6366_CHIP_ID:
                chip->irq_data = &mt6358_irqd;
                break;
 
index 201139b12140ff0af6dd58db01a1da287554d6ad..3d33517f178c622f2fefbc59f7fe15605ff06120 100644 (file)
 #define MT6358_BUCK_VCORE_CON0                0x1488
 #define MT6358_BUCK_VCORE_DBG0                0x149e
 #define MT6358_BUCK_VCORE_DBG1                0x14a0
+#define MT6358_BUCK_VCORE_SSHUB_CON0          0x14a4
+#define MT6358_BUCK_VCORE_SSHUB_CON1          0x14a6
+#define MT6358_BUCK_VCORE_SSHUB_ELR0          MT6358_BUCK_VCORE_SSHUB_CON1
+#define MT6358_BUCK_VCORE_SSHUB_DBG1          MT6358_BUCK_VCORE_DBG1
 #define MT6358_BUCK_VCORE_ELR0                0x14aa
 #define MT6358_BUCK_VGPU_CON0                 0x1508
 #define MT6358_BUCK_VGPU_DBG0                 0x151e
 #define MT6358_LDO_VSRAM_OTHERS_CON0          0x1ba6
 #define MT6358_LDO_VSRAM_OTHERS_DBG0          0x1bc0
 #define MT6358_LDO_VSRAM_OTHERS_DBG1          0x1bc2
+#define MT6358_LDO_VSRAM_OTHERS_SSHUB_CON0    0x1bc4
+#define MT6358_LDO_VSRAM_OTHERS_SSHUB_CON1    0x1bc6
+#define MT6358_LDO_VSRAM_OTHERS_SSHUB_DBG1    MT6358_LDO_VSRAM_OTHERS_DBG1
 #define MT6358_LDO_VSRAM_GPU_CON0             0x1bc8
 #define MT6358_LDO_VSRAM_GPU_DBG0             0x1be2
 #define MT6358_LDO_VSRAM_GPU_DBG1             0x1be4
index 56f210eebc541612f01e953c7e221bdad7c3f2e0..1cf78726503b4099129230ede2f30302aab9b6fd 100644 (file)
@@ -14,6 +14,7 @@ enum chip_id {
        MT6323_CHIP_ID = 0x23,
        MT6358_CHIP_ID = 0x58,
        MT6359_CHIP_ID = 0x59,
+       MT6366_CHIP_ID = 0x66,
        MT6391_CHIP_ID = 0x91,
        MT6397_CHIP_ID = 0x97,
 };