arm64: dts: qcom: sm8250: Add support for SDC2

Add support for SDC2 which can be used to interface uSD card.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[DB: minor fixes: clocks, iommus, opps]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201028190955.1264526-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index cd47622e34bbb3d9b10b440f571a669b401f286c..f4af58f66740f93e9c53089b66cb83c1d0fc0e4c 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -1552,6 +1552,51 @@
                        };
                };
 
+               sdhc_2: sdhci@8804000 {
+                       compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5";
+                       reg = <0 0x08804000 0 0x1000>;
+
+                       interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "hc_irq", "pwr_irq";
+
+                       clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+                                <&gcc GCC_SDCC2_APPS_CLK>,
+                                <&xo_board>;
+                       clock-names = "iface", "core", "xo";
+                       iommus = <&apps_smmu 0x4a0 0x0>;
+                       qcom,dll-config = <0x0007642c>;
+                       qcom,ddr-config = <0x80040868>;
+                       power-domains = <&rpmhpd SM8250_CX>;
+                       operating-points-v2 = <&sdhc2_opp_table>;
+
+                       status = "disabled";
+
+                       sdhc2_opp_table: sdhc2-opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-19200000 {
+                                       opp-hz = /bits/ 64 <19200000>;
+                                       required-opps = <&rpmhpd_opp_min_svs>;
+                               };
+
+                               opp-50000000 {
+                                       opp-hz = /bits/ 64 <50000000>;
+                                       required-opps = <&rpmhpd_opp_low_svs>;
+                               };
+
+                               opp-100000000 {
+                                       opp-hz = /bits/ 64 <100000000>;
+                                       required-opps = <&rpmhpd_opp_svs>;
+                               };
+
+                               opp-202000000 {
+                                       opp-hz = /bits/ 64 <202000000>;
+                                       required-opps = <&rpmhpd_opp_svs_l1>;
+                               };
+                       };
+               };
+
                dc_noc: interconnect@90c0000 {
                        compatible = "qcom,sm8250-dc-noc";
                        reg = <0 0x090c0000 0 0x4200>;