ht_info->reg_short_gi_20mhz = 1;
ht_info->reg_short_gi_40mhz = 1;
- ht_info->bRegBW40MHz = 1;
+ ht_info->reg_bw_40mhz = 1;
- if (ht_info->bRegBW40MHz)
+ if (ht_info->reg_bw_40mhz)
ht_info->bRegSuppCCK = 1;
else
ht_info->bRegSuppCCK = true;
if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
pCapELE->ChlWidth = 0;
else
- pCapELE->ChlWidth = (pHT->bRegBW40MHz ? 1 : 0);
+ pCapELE->ChlWidth = (pHT->reg_bw_40mhz ? 1 : 0);
pCapELE->MimoPwrSave = pHT->self_mimo_ps;
pCapELE->GreenField = 0;
pCapELE->RxSTBC = 0;
pCapELE->DelayBA = 0;
pCapELE->MaxAMSDUSize = (MAX_RECEIVE_BUFFER_SIZE >= 7935) ? 1 : 0;
- pCapELE->DssCCk = ((pHT->bRegBW40MHz) ? (pHT->bRegSuppCCK ? 1 : 0) : 0);
+ pCapELE->DssCCk = ((pHT->reg_bw_40mhz) ? (pHT->bRegSuppCCK ? 1 : 0) : 0);
pCapELE->PSMP = 0;
pCapELE->LSigTxopProtect = 0;
{
struct rt_hi_throughput *ht_info = ieee->ht_info;
- if (!ht_info->bRegBW40MHz)
+ if (!ht_info->reg_bw_40mhz)
return;
if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))