drm/i915/clflush: disallow on discrete
authorMatthew Auld <matthew.auld@intel.com>
Wed, 27 Oct 2021 16:18:11 +0000 (17:18 +0100)
committerMatthew Auld <matthew.auld@intel.com>
Tue, 2 Nov 2021 09:44:06 +0000 (09:44 +0000)
We seem to have an unfortunate issue where we arrive from:

    i915_gem_object_flush_if_display+0x86/0xd0 [i915]
    intel_user_framebuffer_dirty+0x1a/0x50 [i915]
    drm_mode_dirtyfb_ioctl+0xfb/0x1b0

which can be before the pages are populated(and pinned for display), and
so i915_gem_object_has_struct_page() might still return true, as per the
ttm backend. We could re-order the later get_pages() call here, but
since on discrete everything should already be coherent, with the
exception of the display engine, and even there display surfaces must be
allocated in device local-memory anyway, so there should in theory be no
conceivable reason to ever call i915_gem_clflush_object() on discrete.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/4320
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211027161813.3094681-2-matthew.auld@intel.com
drivers/gpu/drm/i915/gem/i915_gem_clflush.c

index 47586a8a1b7327cfcaaa7606c3165159f942898c..fc76175bf9bee22795ee21d1cbfe2d6502a054fa 100644 (file)
@@ -69,6 +69,7 @@ static struct clflush *clflush_work_create(struct drm_i915_gem_object *obj)
 bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
                             unsigned int flags)
 {
+       struct drm_i915_private *i915 = to_i915(obj->base.dev);
        struct clflush *clflush;
 
        assert_object_held(obj);
@@ -80,7 +81,7 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
         * anything not backed by physical memory we consider to be always
         * coherent and not need clflushing.
         */
-       if (!i915_gem_object_has_struct_page(obj)) {
+       if (!i915_gem_object_has_struct_page(obj) || IS_DGFX(i915)) {
                obj->cache_dirty = false;
                return false;
        }
@@ -105,7 +106,7 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
        if (clflush) {
                i915_sw_fence_await_reservation(&clflush->base.chain,
                                                obj->base.resv, NULL, true,
-                                               i915_fence_timeout(to_i915(obj->base.dev)),
+                                               i915_fence_timeout(i915),
                                                I915_FENCE_GFP);
                dma_resv_add_excl_fence(obj->base.resv, &clflush->base.dma);
                dma_fence_work_commit(&clflush->base);