wifi: rtw89: change supported bandwidths of chip_info to bit mask
authorPing-Ke Shih <pkshih@realtek.com>
Fri, 12 Jan 2024 06:26:38 +0000 (14:26 +0800)
committerKalle Valo <kvalo@kernel.org>
Thu, 18 Jan 2024 09:33:20 +0000 (11:33 +0200)
Basically, all chips can support 20/40/80MHz bandwidth, and 8952C can
support 160MHz bandwidth, which is why we introduced support_bw160 before.
The coming WiFi 7 chips will support 320MHz optionally, so change it to
bit mask instead of adding another support_bw320.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240112062640.36922-3-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.c
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/rtw8851b.c
drivers/net/wireless/realtek/rtw89/rtw8852a.c
drivers/net/wireless/realtek/rtw89/rtw8852b.c
drivers/net/wireless/realtek/rtw89/rtw8852c.c
drivers/net/wireless/realtek/rtw89/rtw8922a.c

index 1e722215034e3eacdd4d6060ec62b307af7a4c18..3d93649d5893e64442b80019da7fceacc642012e 100644 (file)
@@ -3611,7 +3611,8 @@ static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev,
                cpu_to_le16(867), cpu_to_le16(1733), cpu_to_le16(2600), cpu_to_le16(3467),
        };
        const struct rtw89_chip_info *chip = rtwdev->chip;
-       const __le16 *highest = chip->support_bw160 ? highest_bw160 : highest_bw80;
+       const __le16 *highest = chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160) ?
+                               highest_bw160 : highest_bw80;
        struct rtw89_hal *hal = &rtwdev->hal;
        u16 tx_mcs_map = 0, rx_mcs_map = 0;
        u8 sts_cap = 3;
@@ -3640,7 +3641,7 @@ static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev,
        vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
                        IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
        vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT;
-       if (chip->support_bw160)
+       if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
                vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
                                IEEE80211_VHT_CAP_SHORT_GI_160;
        vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map);
@@ -3695,7 +3696,7 @@ static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
        } else {
                phy_cap_info[0] =
                        IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G;
-               if (chip->support_bw160)
+               if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
                        phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
        }
        phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
@@ -3713,7 +3714,7 @@ static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
                phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_RX_PARTIAL_BW_SU_IN_20MHZ_MU;
        phy_cap_info[4] = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
                          IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4;
-       if (chip->support_bw160)
+       if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
                phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
        phy_cap_info[5] = no_ng16 ? 0 :
                          IEEE80211_HE_PHY_CAP5_NG16_SU_FEEDBACK |
@@ -3728,7 +3729,7 @@ static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
        phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
                          IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI |
                          IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996;
-       if (chip->support_bw160)
+       if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160))
                phy_cap_info[8] |= IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
                                   IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU;
        phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
@@ -3741,7 +3742,7 @@ static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
                phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
        he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map);
        he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map);
-       if (chip->support_bw160) {
+       if (chip->support_bandwidths & BIT(NL80211_CHAN_WIDTH_160)) {
                he_cap->he_mcs_nss_supp.rx_mcs_160 = cpu_to_le16(mcs_map);
                he_cap->he_mcs_nss_supp.tx_mcs_160 = cpu_to_le16(mcs_map);
        }
index 73694aca1108dd2224bf66707f337b1eb669c2db..d45ddb9320b1fc7bf4bfa9f2d06e66d4f716f169 100644 (file)
@@ -3718,7 +3718,7 @@ struct rtw89_chip_info {
        u32 rf_base_addr[2];
        u8 support_chanctx_num;
        u8 support_bands;
-       bool support_bw160;
+       u16 support_bandwidths;
        bool support_unii4;
        bool ul_tb_waveform_ctrl;
        bool ul_tb_pwr_diff;
index 558ab6c2c24ada2ac05981e98c0c71060ede38d9..6cbdbf26cfd6dd1945f32e5d302fedb58e92ebb8 100644 (file)
@@ -2396,7 +2396,9 @@ const struct rtw89_chip_info rtw8851b_chip_info = {
        .support_chanctx_num    = 0,
        .support_bands          = BIT(NL80211_BAND_2GHZ) |
                                  BIT(NL80211_BAND_5GHZ),
-       .support_bw160          = false,
+       .support_bandwidths     = BIT(NL80211_CHAN_WIDTH_20) |
+                                 BIT(NL80211_CHAN_WIDTH_40) |
+                                 BIT(NL80211_CHAN_WIDTH_80),
        .support_unii4          = true,
        .ul_tb_waveform_ctrl    = true,
        .ul_tb_pwr_diff         = false,
index 3349397e3af16da8bf7455ec987af888ab6e39cf..c8a9fe8e359ad5dc8bd3b09f71dcec0c07f9ed8b 100644 (file)
@@ -2132,7 +2132,9 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
        .support_chanctx_num    = 1,
        .support_bands          = BIT(NL80211_BAND_2GHZ) |
                                  BIT(NL80211_BAND_5GHZ),
-       .support_bw160          = false,
+       .support_bandwidths     = BIT(NL80211_CHAN_WIDTH_20) |
+                                 BIT(NL80211_CHAN_WIDTH_40) |
+                                 BIT(NL80211_CHAN_WIDTH_80),
        .support_unii4          = false,
        .ul_tb_waveform_ctrl    = false,
        .ul_tb_pwr_diff         = false,
index 43e803cb06f2e3801482bd163f917f35b2da9e5a..9bcbbb2d2c6fba8e4ab318538d6ea2062c6647a3 100644 (file)
@@ -2566,7 +2566,9 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
        .support_chanctx_num    = 0,
        .support_bands          = BIT(NL80211_BAND_2GHZ) |
                                  BIT(NL80211_BAND_5GHZ),
-       .support_bw160          = false,
+       .support_bandwidths     = BIT(NL80211_CHAN_WIDTH_20) |
+                                 BIT(NL80211_CHAN_WIDTH_40) |
+                                 BIT(NL80211_CHAN_WIDTH_80),
        .support_unii4          = true,
        .ul_tb_waveform_ctrl    = true,
        .ul_tb_pwr_diff         = false,
index e2393e62175582103bcfd4bd458add598edc1d5f..637656879da48215f094470133fbc603ac6a8bb4 100644 (file)
@@ -2904,7 +2904,10 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
        .support_bands          = BIT(NL80211_BAND_2GHZ) |
                                  BIT(NL80211_BAND_5GHZ) |
                                  BIT(NL80211_BAND_6GHZ),
-       .support_bw160          = true,
+       .support_bandwidths     = BIT(NL80211_CHAN_WIDTH_20) |
+                                 BIT(NL80211_CHAN_WIDTH_40) |
+                                 BIT(NL80211_CHAN_WIDTH_80) |
+                                 BIT(NL80211_CHAN_WIDTH_160),
        .support_unii4          = true,
        .ul_tb_waveform_ctrl    = false,
        .ul_tb_pwr_diff         = true,
index 7f6dde384223d09c664d83dc2181db0fe0ee09e3..067d34b4d32e7ee5e0cd40d5a24811dc5a47cf92 100644 (file)
@@ -866,6 +866,10 @@ const struct rtw89_chip_info rtw8922a_chip_info = {
        .support_bands          = BIT(NL80211_BAND_2GHZ) |
                                  BIT(NL80211_BAND_5GHZ) |
                                  BIT(NL80211_BAND_6GHZ),
+       .support_bandwidths     = BIT(NL80211_CHAN_WIDTH_20) |
+                                 BIT(NL80211_CHAN_WIDTH_40) |
+                                 BIT(NL80211_CHAN_WIDTH_80) |
+                                 BIT(NL80211_CHAN_WIDTH_160),
        .support_unii4          = true,
        .ul_tb_waveform_ctrl    = false,
        .ul_tb_pwr_diff         = false,