#include <nvmm.h>
-struct qemu_vcpu {
+struct AccelCPUState {
struct nvmm_vcpu vcpu;
uint8_t tpr;
bool stop;
static bool nvmm_allowed;
static struct qemu_machine qemu_mach;
-static struct qemu_vcpu *
+static AccelCPUState *
get_qemu_vcpu(CPUState *cpu)
{
- return (struct qemu_vcpu *)cpu->accel;
+ return cpu->accel;
}
static struct nvmm_machine *
{
CPUX86State *env = cpu->env_ptr;
struct nvmm_machine *mach = get_nvmm_mach();
- struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+ AccelCPUState *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
struct nvmm_x64_state *state = vcpu->state;
uint64_t bitmap;
{
CPUX86State *env = cpu->env_ptr;
struct nvmm_machine *mach = get_nvmm_mach();
- struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+ AccelCPUState *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
X86CPU *x86_cpu = X86_CPU(cpu);
struct nvmm_x64_state *state = vcpu->state;
nvmm_can_take_int(CPUState *cpu)
{
CPUX86State *env = cpu->env_ptr;
- struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+ AccelCPUState *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
struct nvmm_machine *mach = get_nvmm_mach();
static bool
nvmm_can_take_nmi(CPUState *cpu)
{
- struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+ AccelCPUState *qcpu = get_qemu_vcpu(cpu);
/*
* Contrary to INTs, NMIs always schedule an exit when they are
{
CPUX86State *env = cpu->env_ptr;
struct nvmm_machine *mach = get_nvmm_mach();
- struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+ AccelCPUState *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
X86CPU *x86_cpu = X86_CPU(cpu);
struct nvmm_x64_state *state = vcpu->state;
static void
nvmm_vcpu_post_run(CPUState *cpu, struct nvmm_vcpu_exit *exit)
{
- struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+ AccelCPUState *qcpu = get_qemu_vcpu(cpu);
CPUX86State *env = cpu->env_ptr;
X86CPU *x86_cpu = X86_CPU(cpu);
uint64_t tpr;
nvmm_handle_rdmsr(struct nvmm_machine *mach, CPUState *cpu,
struct nvmm_vcpu_exit *exit)
{
- struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+ AccelCPUState *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
X86CPU *x86_cpu = X86_CPU(cpu);
struct nvmm_x64_state *state = vcpu->state;
nvmm_handle_wrmsr(struct nvmm_machine *mach, CPUState *cpu,
struct nvmm_vcpu_exit *exit)
{
- struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+ AccelCPUState *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
X86CPU *x86_cpu = X86_CPU(cpu);
struct nvmm_x64_state *state = vcpu->state;
{
CPUX86State *env = cpu->env_ptr;
struct nvmm_machine *mach = get_nvmm_mach();
- struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+ AccelCPUState *qcpu = get_qemu_vcpu(cpu);
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
X86CPU *x86_cpu = X86_CPU(cpu);
struct nvmm_vcpu_exit *exit = vcpu->exit;
nvmm_ipi_signal(int sigcpu)
{
if (current_cpu) {
- struct qemu_vcpu *qcpu = get_qemu_vcpu(current_cpu);
+ AccelCPUState *qcpu = get_qemu_vcpu(current_cpu);
#if NVMM_USER_VERSION >= 2
struct nvmm_vcpu *vcpu = &qcpu->vcpu;
nvmm_vcpu_stop(vcpu);
struct nvmm_vcpu_conf_cpuid cpuid;
struct nvmm_vcpu_conf_tpr tpr;
Error *local_error = NULL;
- struct qemu_vcpu *qcpu;
+ AccelCPUState *qcpu;
int ret, err;
nvmm_init_cpu_signals();
}
}
- qcpu = g_malloc0(sizeof(*qcpu));
+ qcpu = g_new0(AccelCPUState, 1);
ret = nvmm_vcpu_create(mach, cpu->cpu_index, &qcpu->vcpu);
if (ret == -1) {
nvmm_destroy_vcpu(CPUState *cpu)
{
struct nvmm_machine *mach = get_nvmm_mach();
- struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+ AccelCPUState *qcpu = get_qemu_vcpu(cpu);
nvmm_vcpu_destroy(mach, &qcpu->vcpu);
g_free(cpu->accel);