arm64: dts: mediatek: mt6795: xperia-m5: Enable Frequency Hopping

Enable FHCTL with Spread Spectrum for MAINPLL, MPLL and MSDCPLL
as found on the downstream kernel for this smartphone.
Which one to enable, and at what SSC percentage, was found by
dumping the debugging data from a running downstream kernel and
checking the downstream code.

/proc/freqhopping # cat status
FH status:
===============================================
id == fh_status == pll_status == setting_id == curr_freq == user_defined
 0           0             1             0      1599000         0
 1           0             1             0      1716000         0
 2           1             1             2      1092000         0
 3           1             1             2      2912000         0
 4           1             0             2      1600000         0
 5           0             0             0            0         0
 6           0             1             0      1518002         0
 7           0             0             0            0         0
 8           0             0             0            0         0

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230327083647.22017-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
index d3415527d38934027e84ec5c9e60fcd02eeda2dc..52ce3284a46fcc1388cb9442405f84885ee81074 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
+++ b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
@@ -48,6 +48,13 @@
        };
 };
 
+&fhctl {
+       clocks = <&apmixedsys CLK_APMIXED_MAINPLL>, <&apmixedsys CLK_APMIXED_MPLL>,
+                <&apmixedsys CLK_APMIXED_MSDCPLL>;
+       mediatek,hopping-ssc-percent = <8>, <5>, <8>;
+       status = "okay";
+};
+
 &pio {
        uart0_pins: uart0-pins {
                pins-rx {