{ "musb-hdrc.1.auto", "dmareq5", SDMA_FILTER_PARAM(64) }, /* OMAP2420 only */
};
+static struct omap_dma_dev_attr dma_attr = {
+ .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
+ IS_CSSA_32 | IS_CDSA_32,
+ .lch_count = 32,
+};
+
static struct omap_system_dma_plat_info dma_plat_info __initdata = {
.reg_map = reg_map,
.channel_stride = 0x60,
+ .dma_attr = &dma_attr,
.show_dma_caps = omap2_show_dma_caps,
.clear_dma = omap2_clear_dma,
.dma_write = dma_write,
static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
{
struct platform_device *pdev;
- struct omap_system_dma_plat_info p;
- struct omap_dma_dev_attr *d;
struct resource *mem;
char *name = "omap_dma_system";
- p = dma_plat_info;
- p.dma_attr = (struct omap_dma_dev_attr *)oh->dev_attr;
- p.errata = configure_dma_errata();
+ dma_plat_info.errata = configure_dma_errata();
if (soc_is_omap24xx()) {
/* DMA slave map for drivers not yet converted to DT */
- p.slave_map = omap24xx_sdma_dt_map;
- p.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
+ dma_plat_info.slave_map = omap24xx_sdma_dt_map;
+ dma_plat_info.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
}
- pdev = omap_device_build(name, 0, oh, &p, sizeof(p));
+ if (!soc_is_omap242x())
+ dma_attr.dev_caps |= IS_RW_PRIORITY;
+
+ if (soc_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
+ dma_attr.dev_caps |= HS_CHANNELS_RESERVED;
+
+ pdev = omap_device_build(name, 0, oh, &dma_plat_info,
+ sizeof(dma_plat_info));
if (IS_ERR(pdev)) {
pr_err("%s: Can't build omap_device for %s:%s.\n",
__func__, name, oh->name);
return -ENOMEM;
}
- d = oh->dev_attr;
-
- if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
- d->dev_caps |= HS_CHANNELS_RESERVED;
-
/* Check the capabilities register for descriptor loading feature */
if (soc_is_omap24xx() || soc_is_omap34xx() || soc_is_am35xx())
dma_common_ch_end = CCFN;
.flags = HWMOD_16BIT_REG,
};
-/* dma attributes */
-static struct omap_dma_dev_attr dma_dev_attr = {
- .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
- IS_CSSA_32 | IS_CDSA_32,
- .lch_count = 32,
-};
-
static struct omap_hwmod omap2420_dma_system_hwmod = {
.name = "dma",
.class = &omap2xxx_dma_hwmod_class,
.main_clk = "core_l3_ck",
- .dev_attr = &dma_dev_attr,
.flags = HWMOD_NO_IDLEST,
};
.class = &omap2xxx_gpio_hwmod_class,
};
-/* dma attributes */
-static struct omap_dma_dev_attr dma_dev_attr = {
- .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
- IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
- .lch_count = 32,
-};
-
static struct omap_hwmod omap2430_dma_system_hwmod = {
.name = "dma",
.class = &omap2xxx_dma_hwmod_class,
.main_clk = "core_l3_ck",
- .dev_attr = &dma_dev_attr,
.flags = HWMOD_NO_IDLEST,
};
.class = &omap3xxx_gpio_hwmod_class,
};
-/* dma attributes */
-static struct omap_dma_dev_attr dma_dev_attr = {
- .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
- IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
- .lch_count = 32,
-};
-
static struct omap_hwmod_class_sysconfig omap3xxx_dma_sysc = {
.rev_offs = 0x0000,
.sysc_offs = 0x002c,
.idlest_idle_bit = OMAP3430_ST_SDMA_SHIFT,
},
},
- .dev_attr = &dma_dev_attr,
.flags = HWMOD_NO_IDLEST,
};
.sysc = &omap44xx_dma_sysc,
};
-/* dma dev_attr */
-static struct omap_dma_dev_attr dma_dev_attr = {
- .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
- IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
- .lch_count = 32,
-};
-
/* dma_system */
static struct omap_hwmod omap44xx_dma_system_hwmod = {
.name = "dma_system",
.context_offs = OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET,
},
},
- .dev_attr = &dma_dev_attr,
};
/*
.sysc = &omap54xx_dma_sysc,
};
-/* dma dev_attr */
-static struct omap_dma_dev_attr dma_dev_attr = {
- .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
- IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
- .lch_count = 32,
-};
-
/* dma_system */
static struct omap_hwmod omap54xx_dma_system_hwmod = {
.name = "dma_system",
.context_offs = OMAP54XX_RM_DMA_DMA_SYSTEM_CONTEXT_OFFSET,
},
},
- .dev_attr = &dma_dev_attr,
};
/*
.sysc = &dra7xx_dma_sysc,
};
-/* dma dev_attr */
-static struct omap_dma_dev_attr dma_dev_attr = {
- .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
- IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
- .lch_count = 32,
-};
-
/* dma_system */
static struct omap_hwmod dra7xx_dma_system_hwmod = {
.name = "dma_system",
.context_offs = DRA7XX_RM_DMA_DMA_SYSTEM_CONTEXT_OFFSET,
},
},
- .dev_attr = &dma_dev_attr,
};
/*