drm/amdgpu: Initialize xcc mask
authorLijo Lazar <lijo.lazar@amd.com>
Tue, 30 May 2023 06:22:45 +0000 (11:52 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 16:32:21 +0000 (12:32 -0400)
For ASICs which are not initialized through discovery, initialize GFX
cluster as 1.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

index 809558c718e3c386826c5756fb77fb61c2e76fb2..da6caff78c22be23ba918c49f4334c97236c0104 100644 (file)
@@ -3028,6 +3028,7 @@ static int gfx_v6_0_early_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+       adev->gfx.xcc_mask = 1;
        adev->gfx.num_gfx_rings = GFX6_NUM_GFX_RINGS;
        adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),
                                          GFX6_NUM_COMPUTE_RINGS);
index 0f0c12bbe22852de43fcc57afdda6b0ade1f3565..20fcd86a3e79809e297e32c1b230b553a3f5a89d 100644 (file)
@@ -4179,6 +4179,7 @@ static int gfx_v7_0_early_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+       adev->gfx.xcc_mask = 1;
        adev->gfx.num_gfx_rings = GFX7_NUM_GFX_RINGS;
        adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),
                                          AMDGPU_MAX_COMPUTE_RINGS);
index 2f1ef75e126c77f05d345e346492cba646e1222f..51c1745c83697b04a7eab230f5a64847fceabed3 100644 (file)
@@ -5262,6 +5262,7 @@ static int gfx_v8_0_early_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+       adev->gfx.xcc_mask = 1;
        adev->gfx.num_gfx_rings = GFX8_NUM_GFX_RINGS;
        adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),
                                          AMDGPU_MAX_COMPUTE_RINGS);