arm64: dts: imx8mm-kontron: Disable pullups for onboard UART signals on BL OSM-S...

These signals are actively driven by the SoC or by the onboard
transceiver. There's no need to enable the internal pull resistors
and due to silicon errata ERR050080 let's disable the internal ones
to prevent any unwanted behavior in case they wear out.

Fixes: de9618e84f76 ("arm64: dts: Add support for Kontron SL/BL i.MX8MM OSM-S")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts
index 0730c22e5b6b9285d331cf71142dff01fdd3465d..1dd03ef0a783509aea7455ff17e93efeea0a63d2 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts
@@ -313,19 +313,19 @@
 
        pinctrl_uart1: uart1grp {
                fsl,pins = <
-                       MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX              0x140
-                       MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX             0x140
-                       MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B          0x140
-                       MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B          0x140
+                       MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX              0x0
+                       MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX             0x0
+                       MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B          0x0
+                       MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B          0x0
                >;
        };
 
        pinctrl_uart2: uart2grp {
                fsl,pins = <
-                       MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX             0x140
-                       MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX              0x140
-                       MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B           0x140
-                       MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B           0x140
+                       MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX             0x0
+                       MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX              0x0
+                       MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B           0x0
+                       MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B           0x0
                >;
        };