drm/msm/dpu: split irq_control into irq_enable and _disable

The single helper for both enable and disable cases is too complicated,
especially if we start adding more code to these helpers. Split it into
irq_enable and irq_disable cases.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/577526/
Link: https://lore.kernel.org/r/20240208-fd_remove_phys_ops_atomic_mode_set-v4-1-caf5dcd125c0@linaro.org

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index aca689314cceab388998f6b65c6d94b04f661e56..2bb249c564005b8b8f8545d9084d8a96e3422be5 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -721,7 +721,7 @@ static void _dpu_encoder_update_vsync_source(struct dpu_encoder_virt *dpu_enc,
        }
 }
 
-static void _dpu_encoder_irq_control(struct drm_encoder *drm_enc, bool enable)
+static void _dpu_encoder_irq_enable(struct drm_encoder *drm_enc)
 {
        struct dpu_encoder_virt *dpu_enc;
        int i;
@@ -733,14 +733,32 @@ static void _dpu_encoder_irq_control(struct drm_encoder *drm_enc, bool enable)
 
        dpu_enc = to_dpu_encoder_virt(drm_enc);
 
-       DPU_DEBUG_ENC(dpu_enc, "enable:%d\n", enable);
+       DPU_DEBUG_ENC(dpu_enc, "\n");
        for (i = 0; i < dpu_enc->num_phys_encs; i++) {
                struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
 
-               if (phys->ops.irq_control)
-                       phys->ops.irq_control(phys, enable);
+               phys->ops.irq_enable(phys);
+       }
+}
+
+static void _dpu_encoder_irq_disable(struct drm_encoder *drm_enc)
+{
+       struct dpu_encoder_virt *dpu_enc;
+       int i;
+
+       if (!drm_enc) {
+               DPU_ERROR("invalid encoder\n");
+               return;
        }
 
+       dpu_enc = to_dpu_encoder_virt(drm_enc);
+
+       DPU_DEBUG_ENC(dpu_enc, "\n");
+       for (i = 0; i < dpu_enc->num_phys_encs; i++) {
+               struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
+
+               phys->ops.irq_disable(phys);
+       }
 }
 
 static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc,
@@ -766,11 +784,11 @@ static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc,
                pm_runtime_get_sync(&dpu_kms->pdev->dev);
 
                /* enable all the irq */
-               _dpu_encoder_irq_control(drm_enc, true);
+               _dpu_encoder_irq_enable(drm_enc);
 
        } else {
                /* disable all the irq */
-               _dpu_encoder_irq_control(drm_enc, false);
+               _dpu_encoder_irq_disable(drm_enc);
 
                /* disable DPU core clks */
                pm_runtime_put_sync(&dpu_kms->pdev->dev);
@@ -831,7 +849,7 @@ static int dpu_encoder_resource_control(struct drm_encoder *drm_enc,
                }
 
                if (is_vid_mode && dpu_enc->rc_state == DPU_ENC_RC_STATE_IDLE)
-                       _dpu_encoder_irq_control(drm_enc, true);
+                       _dpu_encoder_irq_enable(drm_enc);
                else
                        _dpu_encoder_resource_control_helper(drm_enc, true);
 
@@ -886,7 +904,7 @@ static int dpu_encoder_resource_control(struct drm_encoder *drm_enc,
 
                if (is_vid_mode &&
                          dpu_enc->rc_state == DPU_ENC_RC_STATE_IDLE) {
-                       _dpu_encoder_irq_control(drm_enc, true);
+                       _dpu_encoder_irq_enable(drm_enc);
                }
                /* skip if is already OFF or IDLE, resources are off already */
                else if (dpu_enc->rc_state == DPU_ENC_RC_STATE_OFF ||
@@ -961,7 +979,7 @@ static int dpu_encoder_resource_control(struct drm_encoder *drm_enc,
                }
 
                if (is_vid_mode)
-                       _dpu_encoder_irq_control(drm_enc, false);
+                       _dpu_encoder_irq_disable(drm_enc);
                else
                        _dpu_encoder_resource_control_helper(drm_enc, false);
 

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
index 993f263433314d56f2dc5584a365b0065511b346..8c5b0c8535729811effc73eebd3bc9be36fc5b07 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
@@ -85,7 +85,8 @@ struct dpu_encoder_phys;
  * @handle_post_kickoff:       Do any work necessary post-kickoff work
  * @trigger_start:             Process start event on physical encoder
  * @needs_single_flush:                Whether encoder slaves need to be flushed
- * @irq_control:               Handler to enable/disable all the encoder IRQs
+ * @irq_enable:                        Handler to enable all the encoder IRQs
+ * @irq_disable:               Handler to disable all the encoder IRQs
  * @prepare_idle_pc:           phys encoder can update the vsync_enable status
  *                              on idle power collapse prepare
  * @restore:                   Restore all the encoder configs.
@@ -110,7 +111,8 @@ struct dpu_encoder_phys_ops {
        void (*handle_post_kickoff)(struct dpu_encoder_phys *phys_enc);
        void (*trigger_start)(struct dpu_encoder_phys *phys_enc);
        bool (*needs_single_flush)(struct dpu_encoder_phys *phys_enc);
-       void (*irq_control)(struct dpu_encoder_phys *phys, bool enable);
+       void (*irq_enable)(struct dpu_encoder_phys *phys);
+       void (*irq_disable)(struct dpu_encoder_phys *phys);
        void (*prepare_idle_pc)(struct dpu_encoder_phys *phys_enc);
        void (*restore)(struct dpu_encoder_phys *phys);
        int (*get_line_count)(struct dpu_encoder_phys *phys);

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
index a301e2833177a2e7d4954ea06b3c1477386f626c..de826f9745e55e782ddfc7e69f09a020317e4ffc 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
@@ -291,40 +291,42 @@ end:
        return ret;
 }
 
-static void dpu_encoder_phys_cmd_irq_control(struct dpu_encoder_phys *phys_enc,
-               bool enable)
+static void dpu_encoder_phys_cmd_irq_enable(struct dpu_encoder_phys *phys_enc)
 {
-       trace_dpu_enc_phys_cmd_irq_ctrl(DRMID(phys_enc->parent),
-                       phys_enc->hw_pp->idx - PINGPONG_0,
-                       enable, phys_enc->vblank_refcount);
-
-       if (enable) {
-               dpu_core_irq_register_callback(phys_enc->dpu_kms,
-                               phys_enc->irq[INTR_IDX_PINGPONG],
-                               dpu_encoder_phys_cmd_pp_tx_done_irq,
-                               phys_enc);
+       trace_dpu_enc_phys_cmd_irq_enable(DRMID(phys_enc->parent),
+                                         phys_enc->hw_pp->idx - PINGPONG_0,
+                                         phys_enc->vblank_refcount);
+
+       dpu_core_irq_register_callback(phys_enc->dpu_kms,
+                                      phys_enc->irq[INTR_IDX_PINGPONG],
+                                      dpu_encoder_phys_cmd_pp_tx_done_irq,
+                                      phys_enc);
+       dpu_core_irq_register_callback(phys_enc->dpu_kms,
+                                      phys_enc->irq[INTR_IDX_UNDERRUN],
+                                      dpu_encoder_phys_cmd_underrun_irq,
+                                      phys_enc);
+       dpu_encoder_phys_cmd_control_vblank_irq(phys_enc, true);
+
+       if (dpu_encoder_phys_cmd_is_master(phys_enc))
                dpu_core_irq_register_callback(phys_enc->dpu_kms,
-                               phys_enc->irq[INTR_IDX_UNDERRUN],
-                               dpu_encoder_phys_cmd_underrun_irq,
-                               phys_enc);
-               dpu_encoder_phys_cmd_control_vblank_irq(phys_enc, true);
-
-               if (dpu_encoder_phys_cmd_is_master(phys_enc))
-                       dpu_core_irq_register_callback(phys_enc->dpu_kms,
-                                       phys_enc->irq[INTR_IDX_CTL_START],
-                                       dpu_encoder_phys_cmd_ctl_start_irq,
-                                       phys_enc);
-       } else {
-               if (dpu_encoder_phys_cmd_is_master(phys_enc))
-                       dpu_core_irq_unregister_callback(phys_enc->dpu_kms,
-                                       phys_enc->irq[INTR_IDX_CTL_START]);
+                                              phys_enc->irq[INTR_IDX_CTL_START],
+                                              dpu_encoder_phys_cmd_ctl_start_irq,
+                                              phys_enc);
+}
 
+static void dpu_encoder_phys_cmd_irq_disable(struct dpu_encoder_phys *phys_enc)
+{
+       trace_dpu_enc_phys_cmd_irq_disable(DRMID(phys_enc->parent),
+                                          phys_enc->hw_pp->idx - PINGPONG_0,
+                                          phys_enc->vblank_refcount);
+
+       if (dpu_encoder_phys_cmd_is_master(phys_enc))
                dpu_core_irq_unregister_callback(phys_enc->dpu_kms,
-                               phys_enc->irq[INTR_IDX_UNDERRUN]);
-               dpu_encoder_phys_cmd_control_vblank_irq(phys_enc, false);
-               dpu_core_irq_unregister_callback(phys_enc->dpu_kms,
-                               phys_enc->irq[INTR_IDX_PINGPONG]);
-       }
+                                                phys_enc->irq[INTR_IDX_CTL_START]);
+
+       dpu_core_irq_unregister_callback(phys_enc->dpu_kms, phys_enc->irq[INTR_IDX_UNDERRUN]);
+       dpu_encoder_phys_cmd_control_vblank_irq(phys_enc, false);
+       dpu_core_irq_unregister_callback(phys_enc->dpu_kms, phys_enc->irq[INTR_IDX_PINGPONG]);
 }
 
 static void dpu_encoder_phys_cmd_tearcheck_config(
@@ -713,7 +715,8 @@ static void dpu_encoder_phys_cmd_init_ops(
        ops->wait_for_tx_complete = dpu_encoder_phys_cmd_wait_for_tx_complete;
        ops->trigger_start = dpu_encoder_phys_cmd_trigger_start;
        ops->needs_single_flush = dpu_encoder_phys_cmd_needs_single_flush;
-       ops->irq_control = dpu_encoder_phys_cmd_irq_control;
+       ops->irq_enable = dpu_encoder_phys_cmd_irq_enable;
+       ops->irq_disable = dpu_encoder_phys_cmd_irq_disable;
        ops->restore = dpu_encoder_phys_cmd_enable_helper;
        ops->prepare_idle_pc = dpu_encoder_phys_cmd_prepare_idle_pc;
        ops->handle_post_kickoff = dpu_encoder_phys_cmd_handle_post_kickoff;

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index f562beb6f797179773835788406006c5770e3c24..3943d5588ddc539533983012de87ac24b388c646 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -616,30 +616,33 @@ static void dpu_encoder_phys_vid_handle_post_kickoff(
        }
 }
 
-static void dpu_encoder_phys_vid_irq_control(struct dpu_encoder_phys *phys_enc,
-               bool enable)
+static void dpu_encoder_phys_vid_irq_enable(struct dpu_encoder_phys *phys_enc)
 {
        int ret;
 
-       trace_dpu_enc_phys_vid_irq_ctrl(DRMID(phys_enc->parent),
-                           phys_enc->hw_intf->idx - INTF_0,
-                           enable,
-                          phys_enc->vblank_refcount);
+       trace_dpu_enc_phys_vid_irq_enable(DRMID(phys_enc->parent),
+                                         phys_enc->hw_intf->idx - INTF_0,
+                                         phys_enc->vblank_refcount);
 
-       if (enable) {
-               ret = dpu_encoder_phys_vid_control_vblank_irq(phys_enc, true);
-               if (WARN_ON(ret))
-                       return;
-
-               dpu_core_irq_register_callback(phys_enc->dpu_kms,
-                               phys_enc->irq[INTR_IDX_UNDERRUN],
-                               dpu_encoder_phys_vid_underrun_irq,
-                               phys_enc);
-       } else {
-               dpu_encoder_phys_vid_control_vblank_irq(phys_enc, false);
-               dpu_core_irq_unregister_callback(phys_enc->dpu_kms,
-                               phys_enc->irq[INTR_IDX_UNDERRUN]);
-       }
+       ret = dpu_encoder_phys_vid_control_vblank_irq(phys_enc, true);
+       if (WARN_ON(ret))
+               return;
+
+       dpu_core_irq_register_callback(phys_enc->dpu_kms,
+                                      phys_enc->irq[INTR_IDX_UNDERRUN],
+                                      dpu_encoder_phys_vid_underrun_irq,
+                                      phys_enc);
+}
+
+static void dpu_encoder_phys_vid_irq_disable(struct dpu_encoder_phys *phys_enc)
+{
+       trace_dpu_enc_phys_vid_irq_disable(DRMID(phys_enc->parent),
+                                          phys_enc->hw_intf->idx - INTF_0,
+                                          phys_enc->vblank_refcount);
+
+       dpu_encoder_phys_vid_control_vblank_irq(phys_enc, false);
+       dpu_core_irq_unregister_callback(phys_enc->dpu_kms,
+                                        phys_enc->irq[INTR_IDX_UNDERRUN]);
 }
 
 static int dpu_encoder_phys_vid_get_line_count(
@@ -690,7 +693,8 @@ static void dpu_encoder_phys_vid_init_ops(struct dpu_encoder_phys_ops *ops)
        ops->control_vblank_irq = dpu_encoder_phys_vid_control_vblank_irq;
        ops->wait_for_commit_done = dpu_encoder_phys_vid_wait_for_commit_done;
        ops->wait_for_tx_complete = dpu_encoder_phys_vid_wait_for_tx_complete;
-       ops->irq_control = dpu_encoder_phys_vid_irq_control;
+       ops->irq_enable = dpu_encoder_phys_vid_irq_enable;
+       ops->irq_disable = dpu_encoder_phys_vid_irq_disable;
        ops->prepare_for_kickoff = dpu_encoder_phys_vid_prepare_for_kickoff;
        ops->handle_post_kickoff = dpu_encoder_phys_vid_handle_post_kickoff;
        ops->needs_single_flush = dpu_encoder_phys_vid_needs_single_flush;

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
index 4cd2d9e3131a4325c1259b002a04fba73211a754..60201372548487bd2341d9009cf62fe976764ff5 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
@@ -511,21 +511,31 @@ static void dpu_encoder_phys_wb_done_irq(void *arg)
 }
 
 /**
- * dpu_encoder_phys_wb_irq_ctrl - irq control of WB
+ * dpu_encoder_phys_wb_irq_enable - irq control of WB
  * @phys:      Pointer to physical encoder
- * @enable:    indicates enable or disable interrupts
  */
-static void dpu_encoder_phys_wb_irq_ctrl(
-               struct dpu_encoder_phys *phys, bool enable)
+static void dpu_encoder_phys_wb_irq_enable(struct dpu_encoder_phys *phys)
 {
 
        struct dpu_encoder_phys_wb *wb_enc = to_dpu_encoder_phys_wb(phys);
 
-       if (enable && atomic_inc_return(&wb_enc->wbirq_refcount) == 1)
+       if (atomic_inc_return(&wb_enc->wbirq_refcount) == 1)
                dpu_core_irq_register_callback(phys->dpu_kms,
-                               phys->irq[INTR_IDX_WB_DONE], dpu_encoder_phys_wb_done_irq, phys);
-       else if (!enable &&
-                       atomic_dec_return(&wb_enc->wbirq_refcount) == 0)
+                                              phys->irq[INTR_IDX_WB_DONE],
+                                              dpu_encoder_phys_wb_done_irq,
+                                              phys);
+}
+
+/**
+ * dpu_encoder_phys_wb_irq_disable - irq control of WB
+ * @phys:      Pointer to physical encoder
+ */
+static void dpu_encoder_phys_wb_irq_disable(struct dpu_encoder_phys *phys)
+{
+
+       struct dpu_encoder_phys_wb *wb_enc = to_dpu_encoder_phys_wb(phys);
+
+       if (atomic_dec_return(&wb_enc->wbirq_refcount) == 0)
                dpu_core_irq_unregister_callback(phys->dpu_kms, phys->irq[INTR_IDX_WB_DONE]);
 }
 
@@ -785,7 +795,8 @@ static void dpu_encoder_phys_wb_init_ops(struct dpu_encoder_phys_ops *ops)
        ops->trigger_start = dpu_encoder_helper_trigger_start;
        ops->prepare_wb_job = dpu_encoder_phys_wb_prepare_wb_job;
        ops->cleanup_wb_job = dpu_encoder_phys_wb_cleanup_wb_job;
-       ops->irq_control = dpu_encoder_phys_wb_irq_ctrl;
+       ops->irq_enable = dpu_encoder_phys_wb_irq_enable;
+       ops->irq_disable = dpu_encoder_phys_wb_irq_disable;
        ops->is_valid_for_commit = dpu_encoder_phys_wb_is_valid_for_commit;
 
 }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
index 35d03b121a0b410e395f5ce16ead28c084c4405a..95ce7647ff7666e386ca8f21a30201629bd1e799 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
@@ -514,24 +514,41 @@ TRACE_EVENT(dpu_enc_wait_event_timeout,
                  __entry->expected_time, __entry->atomic_cnt)
 );
 
-TRACE_EVENT(dpu_enc_phys_cmd_irq_ctrl,
-       TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, bool enable,
+TRACE_EVENT(dpu_enc_phys_cmd_irq_enable,
+       TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp,
                 int refcnt),
-       TP_ARGS(drm_id, pp, enable, refcnt),
+       TP_ARGS(drm_id, pp, refcnt),
+       TP_STRUCT__entry(
+               __field(        uint32_t,               drm_id  )
+               __field(        enum dpu_pingpong,      pp      )
+               __field(        int,                    refcnt  )
+       ),
+       TP_fast_assign(
+               __entry->drm_id = drm_id;
+               __entry->pp = pp;
+               __entry->refcnt = refcnt;
+       ),
+       TP_printk("id=%u, pp=%d, refcnt=%d", __entry->drm_id,
+                 __entry->pp,
+                 __entry->refcnt)
+);
+
+TRACE_EVENT(dpu_enc_phys_cmd_irq_disable,
+       TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp,
+                int refcnt),
+       TP_ARGS(drm_id, pp, refcnt),
        TP_STRUCT__entry(
                __field(        uint32_t,               drm_id  )
                __field(        enum dpu_pingpong,      pp      )
-               __field(        bool,                   enable  )
                __field(        int,                    refcnt  )
        ),
        TP_fast_assign(
                __entry->drm_id = drm_id;
                __entry->pp = pp;
-               __entry->enable = enable;
                __entry->refcnt = refcnt;
        ),
-       TP_printk("id=%u, pp=%d, enable=%s, refcnt=%d", __entry->drm_id,
-                 __entry->pp, __entry->enable ? "true" : "false",
+       TP_printk("id=%u, pp=%d, refcnt=%d", __entry->drm_id,
+                 __entry->pp,
                  __entry->refcnt)
 );
 
@@ -592,24 +609,41 @@ TRACE_EVENT(dpu_enc_phys_vid_post_kickoff,
        TP_printk("id=%u, intf_idx=%d", __entry->drm_id, __entry->intf_idx)
 );
 
-TRACE_EVENT(dpu_enc_phys_vid_irq_ctrl,
-       TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx, bool enable,
+TRACE_EVENT(dpu_enc_phys_vid_irq_enable,
+       TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx,
                 int refcnt),
-       TP_ARGS(drm_id, intf_idx, enable, refcnt),
+       TP_ARGS(drm_id, intf_idx, refcnt),
+       TP_STRUCT__entry(
+               __field(        uint32_t,       drm_id          )
+               __field(        enum dpu_intf,  intf_idx        )
+               __field(        int,            refcnt          )
+       ),
+       TP_fast_assign(
+               __entry->drm_id = drm_id;
+               __entry->intf_idx = intf_idx;
+               __entry->refcnt = refcnt;
+       ),
+       TP_printk("id=%u, intf_idx=%d refcnt=%d", __entry->drm_id,
+                 __entry->intf_idx,
+                 __entry->drm_id)
+);
+
+TRACE_EVENT(dpu_enc_phys_vid_irq_disable,
+       TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx,
+                int refcnt),
+       TP_ARGS(drm_id, intf_idx, refcnt),
        TP_STRUCT__entry(
                __field(        uint32_t,       drm_id          )
                __field(        enum dpu_intf,  intf_idx        )
-               __field(        bool,           enable          )
                __field(        int,            refcnt          )
        ),
        TP_fast_assign(
                __entry->drm_id = drm_id;
                __entry->intf_idx = intf_idx;
-               __entry->enable = enable;
                __entry->refcnt = refcnt;
        ),
-       TP_printk("id=%u, intf_idx=%d enable=%s refcnt=%d", __entry->drm_id,
-                 __entry->intf_idx, __entry->enable ? "true" : "false",
+       TP_printk("id=%u, intf_idx=%d refcnt=%d", __entry->drm_id,
+                 __entry->intf_idx,
                  __entry->drm_id)
 );